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AS7C33128PFS16A 데이터시트 - Alliance Semiconductor

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AS7C33128PFS16A

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Functional description
The AS7C33128PFS16A and AS7C33128PFS18A are high performance CMOS 4 Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072words × 16 or 18 bits and incorporate a pipeline for highest frequency on any given technology.


FEATUREs
• Organization: 131,072words × 16 or 18 bits
• Fast clock speeds to 166 MHz in LVTTL/LVCMOS
• Fast clock to data access: 3.5/3.8/4.0/5.0 ns
• Fast OE access time: 3.5/3.8/4.0/5.0 ns
• Fully synchronous register-to-register operation
• “Flow-through” mode
• Single-cycle deselect
• Pentium®* compatible architecture and timing
• Asynchronous output enable control
• Economical 100-pin TQFP package
• Byte write enables
• Multiple chip enables for easy expansion
• 3.3V core power supply
• 2.5V or 3.3V I/O operation with separate VDDQ
• 30 mW typical standby power in power down mode

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제조사
3.3V 128K × 18 pipeline burst synchronous SRAM
Alliance Semiconductor
3.3V 256K × 16/18 pipeline burst synchronous SRAM
Alliance Semiconductor
3.3V 256K × 16/18 pipeline burst synchronous SRAM
Alliance Semiconductor
3.3V 256K × 16/18 pipeline burst synchronous SRAM ( Rev : 2002 )
Alliance Semiconductor
3.3V 256K × 16/18 pipeline burst synchronous SRAM
Alliance Semiconductor
3.3V 256K × 16/18 pipeline burst synchronous SRAM
Alliance Semiconductor
3.3V 512K × 16/18 pipeline burst synchronous SRAM
Alliance Semiconductor
3.3V 256K × 16/18 pipeline burst synchronous SRAM
Alliance Semiconductor
3.3V 256K × 16/18 pipeline burst synchronous SRAM
Alliance Semiconductor
3.3V 512K × 18 pipeline burst synchronous SRAM
Alliance Semiconductor

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