5V 256K X 16 CMOS DRAM (Fast Page Mode)

FEATUREs
• Organization: 262,144 words × 16 bits
• High speed
- 25/30/35/50 ns RASaccess time
- 12/16/18/25 ns column address access time
- 7/10/10/10 ns CASaccess time
• Low power consumption
- Active: 770 mW max (ASAS4C256K16FO-50)
- Standby: 5.5 mW max, CMOS I/O
• Fast page mode
• AS4C256K16FO-50 timings  are also valid for AS4C256K16FO-60.
•Refresh
- 512 refresh cycles, 8 ms refresh interval
- RAS-only or CAS-before-RASrefresh or self-refresh
- Self-refresh option is available for new generation device only. Contact Alliance for more information.
• Read-modify-write
• TTL-compatible, three-state I/O
• JEDEC standard packages
- 400 mil, 40-pin SOJ
- 400 mil, 40/44-pin TSOP II
• Single 5V power supply/built-in Vbb generator
• Latch-up current > 200 mA