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APA300-PQ 데이터시트 - Actel Corporation

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APA300-PQ

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174 Pages

File Size
4.5 MB

제조사
ACTEL
Actel Corporation ACTEL

Features and Benefits
High Capacity

Commercial and Industrial
• 75,000 to 1 Million System Gates
• 27 k to 198 kbits of Two-Port SRAM
• 66 to 712 User I/Os

Military
• 300, 000 to 1 million System Gates
• 72 k to 198 kbits of Two Port SRAM
• 158 to 712 User I/Os

Reprogrammable Flash Technology
• 0.22 µm 4 LM Flash-Based CMOS Process
• Live At Power-Up (LAPU) Level 0 Support
• Single-Chip Solution
• No Configuration Device Required
• Retains Programmed Design during Power-Down/Up Cycles
• Mil/Aero Devices Operate over Full Military Temperature Range

Performance
• 3.3 V, 32-Bit PCI, up to 50 MHz (33 MHz over military temperature)
• Two Integrated PLLs
• External System Performance up to 150 MHz

Secure Programming
• The Industry’s Most Effective Security Key (FlashLock®)

Low Power
• Low Impedance Flash Switches
• Segmented Hierarchical Routing Structure
• Small, Efficient, Configurable (Combinatorial or Sequential) Logic Cells

High Performance Routing Hierarchy
• Ultra-Fast Local and Long-Line Network
• High-Speed Very Long-Line Network
• High-Performance, Low Skew, Splittable Global Network
• 100% Routability and Utilization

I/O
• Schmitt-Trigger Option on Every Input
• 2.5 V/3.3 V Support with Individually-Selectable Voltage and Slew Rate
• Bidirectional Global I/Os
• Compliance with PCI Specification Revision 2.2
• Boundary-Scan Test IEEE Std. 1149.1 (JTAG) Compliant
• Pin Compatible Packages across the ProASICPLUS Family

Unique Clock Conditioning Circuitry
• PLL with Flexible Phase, Multiply/Divide and Delay Capabilities
• Internal and/or External Dynamic PLL Configuration
• Two LVPECL Differential Pairs for Clock or Data Inputs

Standard FPGA and ASIC Design Flow
• Flexibility with Choice of Industry-Standard Front-End Tools
• Efficient Design through Front-End Timing and Gate Optimization

ISP Support
• In-System Programming (ISP) via JTAG Port

SRAMs and FIFOs
• SmartGen Netlist Generation Ensures Optimal Usage of Embedded Memory Blocks
• 24 SRAM and FIFO Configurations with Synchronous and Asynchronous Operation up to 150 MHz (typical)

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 

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상세내역
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제조사
ProASIC PLUS® Flash Family FPGAs
Unspecified
Automotive-Grade ProASIC Flash Family FPGAs
Actel Corporation
ProASIC®3 Flash Family FPGAs with Optional Soft ARM® Support
Unspecified
ProASICPLUS® Flash Family FPGAs ( Rev : 2008 )
Actel Corporation
ProASICPLUS® Flash Family FPGAs
Actel Corporation
1 – ProASIC®3 Flash Family FPGAs with Optional Soft ARM Support
Unspecified
eX Family FPGAs ( Rev : V3_0 )
Actel Corporation
eX Family FPGAs
Unspecified
ex Family FPGAs
Actel Corporation
eX Family FPGAs
Actel Corporation

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