GENERAL DESCRIPTION
The ADSP-21367 SHARC processor is a members of the SIMD SHARC family of DSPs that feature Analog Devices Super Harvard Architecture. The ADSP-21367 is source code compatible with the ADSP-2126x, and ADSP-2116x, DSPs as well as with first generation ADSP-2106x SHARC processors in SISD (Single-Instruction, Single-Data) mode. The ADSP-21367 is a 32- bit/40-bit floating point processors optimized for high performance automotive audio applications with its large on-chip SRAM and mask-programmable ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative Digital Audio Interface (DAI).

SUMMARY
   High performance 32-bit/40-bit floating point processor
      optimized for high performance automotive audio
      processing
   Audio decoder and post processor-algorithm support with
      32-bit floating-point implementations
      Non-volatile memory may be configured to support audio
      decoders and post processor-algorithms like PCM, Dolby
      Digital EX, Dolby Prologic IIx, Dolby Digital Plus, Dolby
      headphone, DTS 96/24, Neo:6, DTS ES, DTS Lossless,
      MPEG2 AAC, MPEG2 2channel, MP3, WMAPro, and
      Multi-channel encoder. Functions like Bass management, Delay,
      Speaker equalization, Graphic equalization, Decoder/postprocessor
      algorithm combination support will vary
      depending upon the chip version and the system
      configurations. Please visit www.analog.com
   Single-Instruction Multiple-Data (SIMD) computational
      architecture
   On-chip memory—2M bit of on-chip SRAM and a dedicated
      6M bit of on-chip mask-programmable ROM
   Code compatible with all other members of the SHARC family
   The ADSP-21367 is available with a 400 MHz core instruction
      rate with unique audio centric peripherals such as the
      Digital Audio Interface, S/PDIF transceiver, serial ports, 8-
      channel asynchronous sample rate converter, precision
      clock generators and more. For complete ordering
      information, see Ordering Guide on page 47