GENERAL DESCRIPTION
The ADF4110 family of frequency synthesizers can be used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. They consist of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual-modulus prescaler (P/P+1). The A (6-bit) and B (13-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator).

FEATURES
   ADF4110: 550 MHz
   ADF4111: 1.2 GHz
   ADF4112: 3.0 GHz
   ADF4113: 4.0 GHz
   2.7 V to 5.5 V Power Supply
   Separate Charge Pump Supply (VP) Allows Extended
      Tuning Voltage in 3 V Systems
   Programmable Dual Modulus Prescaler 8/9, 16/17,
      32/33, 64/65
   Programmable Charge Pump Currents
   Programmable Antibacklash Pulsewidth
   3-Wire Serial Interface
   Analog and Digital Lock Detect
   Hardware and Software Power-Down Mode
  
APPLICATIONS
   Base Stations for Wireless Radio (GSM, PCS, DCS,
      CDMA, WCDMA)
   Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA)
   Wireless LANS
   Communications Test Equipment
   CATV Equipment