General description
The 74LVC1G08 provides one 2-input AND function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

FEATUREs and benefits
◾ Wide supply voltage range from 1.65 V to 5.5 V
◾ High noise immunity
◾ Complies with JEDEC standard:
   ✦ JESD8-7 (1.65 V to 1.95 V)
   ✦ JESD8-5 (2.3 V to 2.7 V)
   ✦ JESD8-B/JESD36 (2.7 V to 3.6 V)
◾ 24 mA output drive (VCC = 3.0 V)
◾ CMOS low power consumption
◾ Latch-up performance ≤ 250 mA
◾ Direct interface with TTL levels
◾ Inputs accept voltages up to 5 V
◾ ESD protection:
   ✦ HBM JESD22-A114F exceeds 2000 V
   ✦ MM JESD22-A115-A exceeds 200 V
◾ Multiple package options
◾ Specified from -40 °C to +85 °C and -40 °C to +125 °C