General description
The 74AHC86; 74AHCT86 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74AHC86; 74AHCT86 provides a 2-input exclusive-OR function.

FEATUREs
■ Balanced propagation delays
■ All inputs have a Schmitt-trigger action
■ Inputs accepts voltages higher than VCC
■ For 74AHC86 only: operates with CMOS input levels
■ For 74AHCT86 only: operates with TTL input levels
■ ESD protection:
    ◆ HBM JESD22-A114E exceeds 2000 V
    ◆ MM JESD22-A115-A exceeds 200 V
    ◆ CDM JESD22-C101C exceeds 1000 V
■ Multiple package options
■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C