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74AHC74D-Q100J 데이터시트 - Nexperia B.V. All rights reserved

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74AHC74D-Q100J

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NEXPERIA
Nexperia B.V. All rights reserved NEXPERIA

General description
The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.


FEATUREs and benefits
■ Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    ◆ Specified from -40 °C to +85 °C and from -40 °C to +125 °C
■ Balanced propagation delays
■ All inputs have Schmitt-trigger actions
■ Inputs accept voltages higher than VCC
■ Input levels:
    ◆ For 74AHC74-Q100: CMOS level
    ◆ For 74AHCT74-Q100: TTL level
■ ESD protection:
    ◆ MIL-STD-883, method 3015 exceeds 2000 V
    ◆ HBM JESD22-A114F exceeds 2000 V
    ◆ MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
■ Multiple package options

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