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24LLC02N8 데이터시트 - CERAMATE TECHNICAL

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24LLC02N8

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19 Pages

File Size
390.5 kB

제조사
Ceramate
CERAMATE TECHNICAL Ceramate

OVERVIEW
The 24LLC02 serial EEPROM has a 2,048-bit capacity, supporting the standard 2I C™-bus serial interface. It is fabricated using Ceramates most advanced CMOS technology. It has been developed for low power and low voltage applications (1.8 V to 5.5 V). One of its major feature is a hardware-based write protection circuit for the entire memory area. Hardware-based write protection is controlled by the state of the write-protect (WP) pin. Using one-page write mode, you can load up to 16 bytes of data into the EEPROM in a single write operation. Another significant feature of the 24LLC02 is its support for fast mode and standard mode.


FEATURES
I2C-Bus Interface
• Two-wire serial interface
• Automatic word address increment EEPROM
• 2K-bit (2,048-bit/256-byte) storage area
• 16-byte page buffer
• Hardware-based write protection for the entire EEPROM (using the WP pin)
• EEPROM programming voltage generated on chip
• 1,000,000 erase/write cycles
• 100 years data retention

Operating Characteristics
• Operating voltage
   — 1.8 V to 5.5 V
• Operating current
   — Maximum write current: < 3 mA at 5.5 V
   — Maximum read current: < 200 mA at 5.5 V
   — Maximum stand-by current: < 5mA at 5.5 V
• Operating temperature range
   — – 25°C to + 70°C (commercial)
   — – 40°C to + 85°C (industrial)
• Operating clock frequencies
   — 100 kHz at standard mode
   — 400 kHz at fast mode
• Electrostatic discharge (ESD)
   — 5,000 V (HBM)
   — 500 V (MM)

Packages
• 8-pin P-DIP , SOP , TSSOP

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