BR24G64NUX-5(2017) 데이터 시트보기 (PDF) - ROHM Semiconductor

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BR24G64NUX-5
(Rev.:2017)

Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire)

ROHM Semiconductor 

BR24G64xxx-5 Series

Input / Output Timing

tR

tF1

tHIGH

SCL

70%

SDA

(input)

tHD:STA

70%

tBUF

30%

70%

30%

70% 70%

30%

tSU:DAT

70%

tLOW

tPD

70%

30%

70%

30%

tHD:DAT

70%

30%

tDH

SDA

(output)

70%

30%

30%

○Input read at the rise edge of SCL

○Data output in sync with the fall of SCL

Figure 5-(a). Input / Output Timing

70%

30%

tF2

SCL

70%

tSU:STA

70%

tHD:STA

70%

tSU:STO

70%

SDA

30%

30%

START condition

STOP condition

Figure 5-(b). Start-Stop Condition Timing

SCL

SDA

D0

write data

(n-th address)

70%

ACK

STOP condition

70%

tWR

START condition

SCL

SDA

WP

Figure 5-(c). Write Cycle Timing

DATA(n)

70%

DATA(1)

30%

tSU:WP

ACK

70%

tWR

70%

tHD:WP

STOP condition

Figure 5-(d). WP Timing at Write Execution

SCL

SDA

WP

DATA(1)

D1

D0

ACK

DATA(n)

tHIGH:WP

70%

70%

ACK

70%

tWR

Figure 5-(e). WP Timing at Write Cancel

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TSZ02201-0GGG0G100910-1-2

30.Nov.2017 Rev.001

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