PI6C184
1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788P9900r11e22c3344i55s66i77o88n990011122-331445536677C8899l00o1122c11k223344B5566u7788f99f00e11r22
DC Operating Specifications (VDD = +3.3V ±5%, TA = 0°C - 70°C)
Symbol
Parameter
Test Condition
Input Voltage
VIH
Input high voltage
VDD
VIL
Input low voltage
IIL
Input leakage current
0 < VIN < VDD
VDD[0-9] = 3.3V ±5%
VOH
Output high voltage
IOH = -1mA
VOL
Output low voltage
IOL = 1mA
COUT
CIN
LPIN
Output pin capacitance
Input pin capacitance
Pin Inductance
TA
Ambient Temperature
No Airflow
Min.
Max.
2.0
VSS –0.3
–5
VDD +0.3
0.8
+5
2.4
0.4
6
5
7
0
70
Units
V
mA
V
pF
nH
°C
SDRAM Clock Buffer Operating Specification
Symbol
Parameter
Test Conditions
IOHMIN
IOHMAX
IOLMIN
IOLMAX
tRHSDRAM
tTHSDRAM
Pull-up current
Pull-up current
Pull-down current
Pull-down current
Output rise edge rate SDRAM only
Output fall edge rate SDRAM only
VOUT = 2.0V
VOUT = 3.135V
VOUT = 1.0V
VOUT = 0.4V
3.3V ±5% @ 04V-2.4V
3.3V ±5% @ 2.4V-0.4V
Min.
–54
54
1.5
1.5
Typ. Max.
–46
53
4
4
AC Timing
Symbol
tSDKP
tSDKH
tSDKL
tSDRISE
tSDFALL
tPLH
tPHL
tPZL,tPZH
tPLZ,tPHZ
Duty Cycle
tSDSKW
Parameter
SDRAM CLK period
SDRAM CLK high time
SDRAM CLK low time
SDRAM CLK rise time
SDRAM CLK fall time
SDRAM Buffer LH propagation delay
SDRAM Buffer HL propagation delay
SDRAM Buffer Enable delay
SDRAM Buffer Disable delay
Measured at 1.5V
SDRAM Output to Output Skew
66 MHz
Min.
Max.
15.0
15.5
5.6
5.3
1.5
4.0
1.5
4.0
1.0
5.0
1.0
5.0
1.0
8.0
1.0
8.0
45
55
250
100 MHz
Min.
Max.
10.0
10.5
3.3
3.1
1.5
4.0
1.5
4.0
1.0
5.0
1.0
5.0
1.0
8.0
1.0
8.0
45
55
250
Units
mA
V/ns
Units
ns
V/ns
ns
%
ps
4
PS8320A 10/14/02