mPD78062Y,78063Y,78064Y
5.4 CLOCK OUTPUT CONTROL CIRCUIT
Clocks of the following frequency can be output as clock outputs.
Ý 19.5 kHz/39.1kHz/78.1 kHz/156 kHz/313 kHz/625 kHz/1.25 MHz/2.5 MHz/5.0 MHz (main system clock: at 5.0
kHz operation)
Ý 32.768 kHz (subsystem clock: at 32.768 kHz operation)
H
Fig. 5-6 Clock Output Circuit Block Diagram
fXX
fXX/2
fXX/22
fXX/23
fXX/24
fXX/25
fXX/26
fXX/27
fXT
Selector
Synchronization
Circuit
Output Control Circuit
PCL/P35
5.5 BUZZER OUTPUT CONTROL CIRCUIT
Clocks of the following frequency can be output as buzzer outputs.
Ý 1.2 kHz/2.4 kHz/4.9 kHz/9.8 kHz (main system clock : at 5.0 MHz operation)
H
Fig. 5-7 Buzzer Output Control Circuit Block Diagram
fXX/29
fXX/210
fXX/211
Selector
Output Control Circuit
BUZ/P36
22