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ISL976787IBZ-T

4-Channel LED Driver with Phase Shift Control and 10-Bit Dimming Resolution

Renesas Electronics 

ISL97687

CSEL = 1: The current setting is based on ISET2

This is typically used in 3D systems to provide a higher current

level in 3D modes, but is not restricted to this application. CSEL

can be switched in operation and updates immediately in direct

PWM mode, and at the start of the next PWM dimming cycle in

other modes.

LED DC DIMMING

It is possible to control the LED current by applying a DC voltage

VDIM to the ISET1/2 pin via a resistor as in Figure 21.

ISET

VISET: 1.21V

RISET

RDIM

VDIM

FIGURE 21. LED CURRENT CONTROL WITH VDIM

If the VDIM is above VISET 1.21V, the brightness will reduce, and

vice versa. In this configuration, it is important that the control

voltage be set to the maximum brightness (minimum voltage)

level when the ISL97687 is enabled, even if the LEDs are not lit

at this point. This is necessary to allow the chip to calibrate to the

maximum current level that will need to be supported.

Otherwise, on-chip power dissipation will be higher at current

levels above the start-up level. Dimming with this technique

should be limited to a minimum of 10~20% brightness, as LED

current accuracy is increasingly degraded at lower levels.

LED PWM CONTROL

The ISL97687 provides many different PWM dimming methods.

Each of these results in PWM chopping of the current in the LEDs

of all 4 channels, to provide an average LED current and control

the brightness. During the on-periods, the LED peak current will

be defined by the value of the resistor on ISET1 or ISET2, as

described in Equation 2.

Dimming can either be “direct PWM” mode, where both the

frequency and duty cycle of the LEDs match that of the incoming

PWMI signal, or the duty cycle and frequency sources must be

selected from the following.

SUPPORTED LED DUTY CYCLE SOURCES

• Decoded PWMI pin duty cycle (PWM input mode)

• Decoded ACTL pin voltage (Analog input mode)

• Analog*PWM input mode (Both PWM and Analog inputs are

used)

SUPPORTED LED FREQUENCY SOURCES

• Free running internal oscillator (Internal PWM frequency

mode)

• Frequency can be phase and frequency locked to frame rate

(VSYNC mode)

Additionally, phase shift mode can be enabled in all

configurations except direct PWM, allowing the LED strings to

turn on in sequence.

LED PWM DIMMING IN DIRECT PWM MODE

When the PWM_SET/PLL pin is tied to VDC, the PWMI input

signal is used to directly control the LEDs. The dimming

frequency and phase of the LEDs will be the same as that of

PWMI. This mode can be used to get very high effective PWM

resolution, as the resolution is effectively determined by the

PWMI signal source.

LED PWM DIMMING – DUTY CYCLE CONTROL

In non-direct PWM mode, the ISL97687 can decode the incoming

PWMI duty cycle information at 10-bit resolution and the ACTL

voltage level at 8-bit resolution and apply these values to the

LEDs as a PWM output at a new frequency.

For applications where DC-PWM dimming is required, the analog

dimming mode must be enabled (EN_ADIM = high). The analog

control input pin (ACTL) must then be fed with a voltage of 0.3V

to 3.0V. This is decoded as an 8-bit duty cycle of 0% to 100%

respectively. This interface supports backward compatibility with

CCFL backlight driving systems, but can also be used in other

applications, such as analog ALS interfaces. External circuitry

can be used to shift most analog input ranges to the required

level. Figure 22 is an example that maps a 0V to 3.5V input to

give a 10-100% output range, but this can be tailored to other

requirements. The PWM dimming frequency, set by the

PWM_SET pin, should be at least 1kHz when EN_ADIM is high.

In Analog mode, the decoded 10-bit PWM duty cycle information

from the PWMI pin is also used, multiplied by the 8-bit level

decoded from the ACTL pin. For example, if ACTL = 2.3V (74%)

and PWMI = 50%, then LED dimming will be 74% x 50% = 37%.

For analog dimming applications where this multiplication is not

needed, PWMI should be tied high, giving the ACTL pin full

control over the duty cycle range. For applications where analog

dimming is not needed, EN_ADIM should be low and PWMI

should be driven with the required duty cycle.

FIGURE 22. EXAMPLE OF ACTL INPUT ADJUSTMENT

FN7714 Rev.3.00

Sep 13, 2017

Page 12 of 24

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