12032IVZ 데이터 시트보기 (PDF) - Renesas Electronics
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12032IVZ
Renesas Electronics
12032IVZ Datasheet PDF : 26 Pages
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ISL12032 Real Time Clock with 50/60 Hz clock and Crystal Backup
I2C Interface Specifications Specifications apply for: VDD = 2.7V to 5.5V, TA = -40°C to +85°C, unless otherwise stated. Boldface limits
apply over the operating temperature range, -40°C to +85°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
(Note 13) (Note 7) (Note 13) UNITS NOTES
tLOW
Clock LOW Time
Measured at the 30% of VDD
1300
ns
crossing.
tHIGH
Clock HIGH Time
Measured at the 70% of VDD
600
ns
crossing.
tSU:STA
tHD:STA
tSU:DAT
tHD:DAT
tSU:STO
tHD:STO
tDH
tR
tF
Cb
START Condition Setup Time
START Condition Hold Time
Input Data Setup Time
Input Data Hold Time
STOP Condition Setup Time
STOP Condition Hold Time
Output Data Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive loading of SDA or SCL
SCL rising edge to SDA
falling edge. Both crossing
70% of VDD.
From SDA falling edge
crossing 30% of VDD to SCL
falling edge crossing 70% of
VDD.
From SDA exiting the 30% to
70% of VDD window, to SCL
rising edge crossing 30% of
VDD.
From SCL falling edge
crossing 30% of VDD to SDA
entering the 30% to 70% of
VDD window.
From SCL rising edge
crossing 70% of VDD, to SDA
rising edge crossing 30% of
VDD.
From SDA rising edge to
SCL falling edge. Both
crossing 70% of VDD.
From SCL falling edge
crossing 30% of VDD, until
SDA enters the 30% to 70%
of VDD window.
From 30% to 70% of VDD.
From 70% to 30% of VDD.
Total on-chip and off-chip
600
600
100
0
600
600
0
20 + 0.1 x Cb
20 + 0.1 x Cb
10
ns
ns
ns
900
ns
ns
ns
ns
300
ns
10, 12
300
ns
10, 12
400
pF
10, 12
RPU
SDA and SCL Bus Pull-up Resistor Maximum is determined by
1
Off-chip
tR and tF.
For Cb = 400pF, max is about
2k.
For Cb = 40pF, max is about
15k
k
10, 12
NOTES:
5. IRQ and FOUT Inactive.
6. VDD > VBAT +VBATHYS
7. Specified at TA =+25°C.
8. FSCL = 400kHz.
9. In order to ensure proper timekeeping, the VDD SR- specification must be followed.
10. Parameter is not 100% tested.
11. VDD = 0V. IBAT increases at VDD voltages between 0.5V and 1.5V.
12. These are I2C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate specification.
13. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
FN6618 Rev 3.00
May 5, 2011
Page 6 of 26
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