MB88152A 데이터 시트보기 (PDF) - Cypress Semiconductor

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MB88152A

Spread Spectrum Clock Generator

Cypress Semiconductor 

11. Output Clock Duty Cycle (tDCC = tb/ta)

ta

tb

CKOUT

MB88152A

1.5 V

12. Input Frequency (fin = 1/tin)

tin

XIN

0.8 VDD

13. Output Slew Rate (SR)

CKOUT

tr

Note: SR = (2.4−0.4) /tr, SR = (2.4−0.4) /tf

2.4 V

0.4 V

tf

14. Cycle-cycle Jitter (tJC = | tn − tn + 1 |)

CKOUT

tn

tn+1

Note: Cycle-cycle jitter is defined the difference between a certain cycle and immediately after

(or, immediately before) .

Document Number: 002-08308 Rev. *B

Page 15 of 24

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