MC33989(2002) 데이터 시트보기 (PDF) - Freescale Semiconductor
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MC33989 Datasheet PDF : 32 Pages
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MC33989
Freescale Semiconductor, Inc.
(Vsup From 5.5V to 18V and Tamb -40°C to 125°C)
For all pins except CANH, CANL, Tx and Rx which are described in the CAN module section
Description
Symbol
Characteristics
Min
Typ
Max
Unit
Reset Pin (output pin only, supply from Vdd1. Structure switch to gnd with pull up current source)
High Level Output current
Ioh
-300
-250
-150
uA
Low Level Output Voltage (I0=1.5mA)
Low Level Output Voltage (I0=tbd mA)
Reset pull down current
Vol
0
Vol
0
Ipdw
2.3
0.9
V
0.9
V
5
mA
Reset Duration after Vdd1 High
reset-dur
3
3.4
4
ms
Wdogb output pin (Push pull structure)
Low Level Output Voltage (I0=1.5mA)
High Level Output Voltage (I0=-250uA)
INT Pin( Push pull structure)
Vol
0
Voh
Vdd1-0.9
0.9
V
Vdd1
Low Level Output Voltage (I0=1.5mA)
High Level Output Voltage (I0=-250uA)
HS1: 150mA High side output pin
Vol
0
Voh
Vdd1-0.9
0.9
V
Vdd1
Rdson at Tj=25°C, and Iout -150mA
Ron25
2
2.5
Ohms
Rdson at Ta=125°C, and Iout -150mA
Ron125
4.5
Ohms
Rdson at Ta=125°C, and Iout -120mA
Ron125-2
3.5
5.5
Ohms
Output current limitation
Ilim
160
500
mA
Over temperature Shutdown
Ovt
155
190
°C
Leakage current
Ileak
10
uA
Output Clamp Voltage at Iout= -10mA
Vcl
-1.5
-0.3
V
L0, L1, L2, L3 inputs
Negative Switching Threshold
Vthn
2
2.5
3
V
2.5
3
3.6
2.7
3.2
3.7
Positive Switching Threshold
Vthp
2.7
3.3
3.8
V
3
4
4.6
3.5
4.2
4.7
Hysteresis
Vhyst
0.6
1.3
V
Input current
Iin
-10
10
uA
Wake up Filter Time
Twuf
8
20
38
us
DIGITAL INTERFACE TIMING
SPI operation frequency
Freq
0.25
4
MHz
SCLK Clock Period
SCLK Clock High Time
SCLK Clock Low Time
Falling Edge of CS to Rising
Edge of SCLK
tpCLK
250
twSCLKH
125
twSCLKL
125
tlead
100
N/A
ns
N/A
ns
N/A
ns
N/A
ns
Falling Edge of SCLK to Rising Edge of
CS
tlag
100
N/A
ns
MOSI to Falling Edge of SCLK
tSISU
40
Falling Edge of SCLK to MOSI
tSIH
40
MISO Rise Time (CL = 220pF)
trSO
MISO Fall Time (CL = 220pF)
tfSO
Time from Falling or Rising Edges of CS to:
- MISO Low Impedance
- MISO High Impedance
tSOEN
tSODIS
Time from Rising Edge of SCLK to MISO
Data Valid
tvalid
N/A
ns
N/A
ns
25
50
ns
25
50
ns
50
ns
50
50
ns
MC33989
For More Information On This Product,
Go to: www.freescale.com
Conditions
0<Vout<0.7Vdd
5.5v<Vsup<27V
1v<Vsup<5.5V
V>0.9V
1v<Vsup<27V
Vsup>9V
Vsup>9V
5.5<Vsup<9V
no inductive load drive
capability
5.5V<Vsup<6V
6V<Vsup<18V
18V<Vsup<27
5.5V<Vsup<6V
6V<Vsup<18V
18V<Vsup<27
5.5V<Vsup<27
-0.2V < Vin < 40V
0.2 V1=<MISO>=0.8V1,
CL=200pF
5
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