TR8100 데이터 시트보기 (PDF) - Murata Manufacturing
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TR8100 Datasheet PDF : 15 Pages
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Tranceiver Set-Up, 3.0 Vdc, -40 to +85 °C
Item
Symbol
Encoded Data Rate
Minimum Signal Pulse
Maximum Signal Pulse
PKDET Capacitor
BBOUT Capacitor
TXMOD Resistor
LPFADJ Resistor
RREF Resistor
THLD2 Resistor
THLD1 Resistor2
DRNOM
SPMIN
SPMAX
CPKD
CBBO
RTXM
RLPF
RREF
RTH2
RTH1
DC Bypass Capacitor
RF Bypass Capacitor
Series Tuning Inductor
Shunt Tuning/ESD Inductor
RF Bypass Bead
CDCB
CRFB
LAT
LESD
LRFB
OOK
4.8
208.32
833.28
.022
0.01
6.2
470
100
-
20
4.7
27
15
100
Fair-Rite
OOK
19.2
52.08
208.32
.0056
0.0027
6.2
160
100
-
20
4.7
27
15
100
Fair-Rite
ASK
115.2
8.68
34.72
820 pF
390 pF
6.2
24
100
100
20
4.7
27
15
100
Fair-Rite
Units
kb/s
µs
µs
µF
µF
K
K
K
K
K
µF
pF
nH
nH
Notes
see pages 1 & 2
single bit
4 bits of same value
±10% ceramic
±10% ceramic
±5%, for 10 dBm output
±5%
±1%
±1%, typical values
±1%, typical values
tantalum
±5% NPO
50 ohm antenna
50 ohm antenna
2506033017YO or equivalent
CAUTION: Electrostatic Sensitive Device. Observe precautions for handling.
NOTES:
1. For default 2G ASH control mode operation under FCC 15.249 regulations, a TXMOD resistor value of 22K is typically required.
2. When using internal data and clock recovery, a THLD1 value of 47K is recommended to minimize start vector “nuisance tripping” due to random noise.
©2010-2015 by Murata Electronics N.A., Inc.
TR8100 (R) 4/24/15
Page 3 of 15
www.murata.com
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