TR8100 데이터 시트보기 (PDF) - Murata Manufacturing
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TR8100 Datasheet PDF : 15 Pages
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Control Register Read/Write Detail
Single Byte Write Sequence
The write, address and data bits are clocked into the radio (left to right) on the rising edge of the clock input to Pin 18.
Pin 19
Pin 18
Pin 17
W
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
Single Byte Read Sequence
The read and address bits and are clocked into the radio on the rising edge of the clock input to Pin 18;
data is output on the rising edge of the clock and should be read into the host on the falling edge of the clock.
Pin 19
Pin 18
Pin 17
R
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
Multi-byte Write Sequence
Address increments automatically and rolls over from address 2 to address 0.
Pin 19
Pin 18
Pin 17 D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
next to last byte
last data byte
Multi-byte Read Sequence
Address increments automatically and rolls over from address 2 to address 0.
Pin 19
Pin 18
Pin 17 D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
next to last byte
last data byte
Figure 4
©2010-2015 by Murata Electronics N.A., Inc.
TR8100 (R) 4/24/15
Page 11 of 15
www.murata.com
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