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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

MAX186ACAP(2012) 데이터 시트보기 (PDF) - Maxim Integrated

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MAX186ACAP
(Rev.:2012)
MaximIC
Maxim Integrated MaximIC
MAX186ACAP Datasheet PDF : 25 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MAX186/MAX188
Low-Power, 8-Channel,
Serial 12-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 5V ±5%; VSS = 0V or -5V; fCLK = 2.0MHz, external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps); MAX186—
4.7µF capacitor at VREF pin; MAX188—external reference, VREF = 4.096V applied to VREF pin; TA = TMIN to TMAX, unless otherwise
noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
Small-Signal Bandwidth
-3dB rolloff
Full-Power Bandwidth
CONVERSION RATE
Conversion Time (Note 5)
Internal clock
5.5
t CONV External clock, 2MHz, 12 clocks/conversion 6
Track/Hold Acquisition Time
tAZ
Aperture Delay
Aperture Jitter
Internal Clock Frequency
External compensation, 4.7µF
0.1
External Clock Frequency Range
Internal compensation (Note 6)
0.1
Used for data transfer only
ANALOG INPUT
Input Voltage Range,
Single-Ended and Differential
(Note 9)
Unipolar, VSS = 0V
Bipolar, VSS = -5V
TYP MAX UNITS
4.5
MHz
800
kHz
10
1.5
10
<50
1.7
2.0
0.4
10
µs
µs
ns
ps
MHz
MHz
0 to
VREF
V
±VREF/2
Multiplexer Leakage Current
On/off leakage current, VIN = ±5V
Input Capacitance
(Note 6)
INTERNAL REFERENCE (MAX186 only, reference buffer enabled)
VREF Output Voltage
TA = +25°C
VREF Short-Circuit Current
VREF Tempco
MAX186A, MAX186B, MAX186_C
MAX186C
MAX186_E
MAX186D
Load Regulation (Note 7)
0 to 0.5mA output load
Capacitive Bypass at VREF
Internal compensation
External compensation
Capacitive Bypass at REFADJ
Internal compensation
External compensation
REFADJ Adjustment Range
EXTERNAL REFERENCE AT VREF (Buffer disabled, VREF = 4.096V)
Input Voltage Range
Input Current
Input Resistance
Shutdown VREF Input Current
Buffer Disable Threshold REFADJ
±0.01 ±1
µA
16
pF
4.076
0
4.7
0.01
0.01
4.096
±30
±30
±30
2.5
±1.5
4.116
30
±50
±60
V
mA
ppm/°C
mV
µF
µF
%
2.50
VDD +
50mV
V
200
350
µA
12
20
kΩ
1.5
10
µA
VDD -
50mV
V
Maxim Integrated
3

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