MAX188ACAP(2012) 데이터 시트보기 (PDF) - Maxim Integrated

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MAX188ACAP
(Rev.:2012)

Low-Power, 8-Channel, Serial 12-Bit ADCs

Maxim Integrated 

MAX186/MAX188

Low-Power, 8-Channel,

Serial 12-Bit ADCs

CLOCK

MODE

SHDN

DIN

INTERNAL

SETS EXTERNAL

CLOCK MODE

SXXXXX11

EXTERNAL

SX X XXX0 1

SETS FAST

POWER-DOWN

MODE

SETS EXTERNAL

CLOCK MODE

S XX XXX1 1

EXTERNAL

DOUT

MODE

DATA VALID

(12 DATA BITS)

POWERED UP

DATA VALID

(12 DATA BITS)

VALID DATA INVALID

FAST POWERED UP

POWER-DOWN

FULL

POWER

DOWN

POWERED

UP

Figure 12a. Timing Diagram Power-Down Modes, External Clock

Table 5. Typical Power-Up Delay Times

Reference

Buffer

Enabled

Enabled

Enabled

Enabled

Disabled

Disabled

Reference-

Buffer

Compensation

Mode

Internal

Internal

External

External

VREF

Capacitor

(μF)

4.7

4.7

Table 6. Software Shutdown and Clock Mode

PD1 PD0

11

10

01

00

Device Mode

External Clock Mode

Internal Clock Mode

Fast Power-Down Mode

Full Power-Down Mode

Power-

Down

Mode

Power-Up

Delay

(s)

Maximum

Sampling

Rate (ksps)

Fast

5µ

26

Full

300µ

26

Fast

See Figure 14c

133

Full

See Figure 14c

133

Fast

2µ

133

Full

2µ

133

Table 7. Hard-Wired Shutdown and

Compensation Mode

SHDN

State

1

Open

0

Device

Mode

Reference-Buffer

Compensation

Enabled

Internal Compensation

Enabled

External Compensation

Full Power-Down

N/A

16

Maxim Integrated

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