HCTS161AD 데이터 시트보기 (PDF) - Intersil

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HCTS161AD

Radiation Hardened Synchronous Counter

Intersil 

HCTS161AMS

Propagation Delay Timing Diagram

VIH

VSS

VOH

VOL

VS

INPUT

TPLH

VS

TPHL

OUTPUT

Propagation Delay Load Circuit

DUT

TEST

POINT

CL

RL

CL = 50pF

RL = 500Ω

AC VOLTAGE LEVELS

PARAMETER

HCTS

VCC

4.50

VIH

3.00

VS

1.30

VIL

0

GND

0

UNITS

V

V

V

V

V

Pulse Width, Setup, Hold Timing Diagram

Positive Edge Trigger

INPUT

VIH

TW

AC Load Circuit

DUT

CL

VS

VIL

TH

TSU

INPUT CP

TW

VIH

VS

VIL

TH = HOLD TIME

TSU = SETUP TIME

TW = PULSE WIDTH

VOLTAGE LEVELS

PARAMETER

HCTS

VCC

4.50

VIH

3.00

VS

1.30

VIL

0

GND

0

UNITS

V

V

V

V

V

CL = 50pF

RL = 500Ω

8

TEST

POINT

RL

Spec Number 518888

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