BR9080AF-W 데이터 시트보기 (PDF) - ROHM Semiconductor
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BR9080AF-W Datasheet PDF : 13 Pages
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Memory ICs
BR9080AF-W / BR9080ARFV-W / BR9080ARFVM-W /
BR9016AF-W / BR9016ARFV-W / BR9016ARFVM-W
!Operating timing characteristics
BR9080AF-W / ARFV-W / ARFVM-W, BR9016AF-W / ARFV-W / ARFVM-W
(Unless otherwise noted, Ta=−40∼85°C, VCC=2.7V∼5.5V)
Parameter
Symbol Min. Typ. Max. Unit
CS setup time
fCSS
100
−
−
ns
CS hold time
tCSH
100
−
−
ns
Data setup time
tDIS
100
−
−
ns
Data hold time
tDIH
100
−
−
ns
DO rise delay time
tPD1
−
−
150 ns
DO fall delay time
tPD0
−
−
150 ns
Self-timing programming cycle
tE / W
−
−
10
ms
CS minimum high level time
tCS
250
−
−
ns
READY / BUSY display valid time
tSV
−
−
150 ns
Time when DO goes HIGH-Z (via CS)
tOH
0
−
150 ns
Data clock high level time
tWH
230
−
−
ns
Data clock low level time
tWL
230
−
−
ns
Write control setup time
tWCS
0
−
−
ns
Write control hold time
tWCH
0
−
−
ns
!Timing chart
Synchronous Data Input Output Timing
CS
tCS
tWH
tCSS
tCSH
tDIH
SK
tWL
tDIS
DI
tPD
DO
tPD
tOH
WC
Fig.2
· Input data are clocked in to DI at the rising edge of the clock (SK).
· Output data will toggle on the falling edge of the SK clock.
· The WC pin does not have any effect on the READ, EWEN and EWDS operations.
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