SL1062AN 데이터 시트보기 (PDF) - System Logic Semiconductor

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SL1062AN

Low Voltage Transmission Circuit with Dialler Interface

System Logic Semiconductor 

SL1062A

ELECTRICAL CHARACTERISTICS(Iline = 11 to 140 mA; VEE = 0 V; f = 800 Hz;Tamb = 25°C; unless

other specified)

Symbol

Parameter

Test Conditions

Guaranteed Limits

Unit

Min Typ Max

Microphone inputs MIC- and MIC+ (pins 6 and 7)

Zi

Input Impedance

differential

single -ended

between MIC- and MIC+

MIC- or MIC+ to VEE

KΩ

-

64

-

-

32

-

CMRR Common Mode Rejection

Ratio

-

82

-

dB

Gv

Voltage Gain MIC+ or MIC- Iline = 15 mA

to LN

R7 = 68 KΩ

50.5

53.5 dB

∆Gvf Gain Variation with

f = 300 and 3400 Hz

Frequency Reference to 800

Hz

-

±0.2

-

dB

∆GvT

Gain Variation with

Temperature Referenced to

25°C

without R6; Iline =50 mA;

Tamb = -25 and +75°C

-

±0.2

-

dB

DTMF input (pin 11)

Zi Input Impedance

Gv

Voltage Gain from DTMF to

LN

Iline 15 mA; R7 = 68 KΩ

-

20.7

-

KΩ

24.0

-

27.0 dB

∆Gvf Gain Variation with

Frequency Reference to

800 Hz

f = 300 and 3400 Hz

-

±0.2

-

dB

∆GvT

Gain Variation with

Temperature Referenced to

25°C

Iline =50 mA;

Tamb = -25 and +75°C

-

±0.2

-

dB

Gain Adjustment Inputs GAS1 and GAS2 (pins 2 and 3)

∆Gv Transmitting Amplifier Gain

Variation by Adjustment of

R7 between GAS1 and GAS2

-8

-

0

dB

Sending Amplifier Output LN (pin 1)

VLN(rms)

Vno(rms)

Output Voltage (RMS value)

Noise Output Voltage (RMS

value)

THD = 10%

Iline = 4 mA

Iline = 15 mA

Iline = 15 mA; R7 =68KΩ

200 Ω between MIC- and

MIC+

-

0.8

1.7

-

-

-69

V

-

-

-

dBmp

Receiving Amplifier Input IR (pin 10)

Zi Input Impedance

Receiving amplifier output QR (pin 4)

Zo Output Impedance

Gv

Voltage Gain from IR to QR

Iline 15 mA; RL = 300 Ω

(from pin 9 to pin 4)

-

21

-

KΩ

-

4

-

Ω

29.5

-

32.5

dB

(continued)

SLS

System Logic

Semiconductor

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