SL1062AN 데이터 시트보기 (PDF) - System Logic Semiconductor
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SL1062AN Datasheet PDF : 9 Pages
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SL1062A
PIN DESCRIPTION
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Designation
LN
GAS1
GAS2
QR
GAR
MIC-
MIC+
STAB
VEE
IR
DTMF
MUTE
VCC
REG
AGC
SLPE
Description
positive line terminal
gain adjustment; transmitting amplifier
gain adjustment; transmitting amplifier
non-inverting output; receiving amplifier
gain adjustment; receiving amplifier
inverting microphone input
non-inverting microphone input
current stabilizer
negative line terminal
receiving amplifier input
dual-tone multi-frequency input
mute input
possitive supply decoupling
voltage regulator decoupling
automatic gain control input
slope (DC resistance) adjustment
FUNCTIONAL DESCRIPTION
Supplies VCC, LN, SLPE, REG and STAB
Power for the IC and its peripheral circuits is usually
obtained from the telephone line. The supply voltage
is derived from the line via a dropping resistor and
regulated by the IC. The supply voltage VCC may also
be used to supply external circuits e.g. dialling and
control circuits.
Decoupling of the supply voltage is performed by a
capacitor between VCC and VEE. The internal voltage
regulator is decoupled by a capacitor between REG
and VEE.
The DC current flowing into the set is determined by
the exchange supply voltage Vexch, the feeding bridge
resistance Rexch and the DC resistance of the
telephone line Rline.
The circuit has an internal current stabilizer operating
at a level determined by a 3.6 KΩ resistor connected
between STAB and VEE (see Fig.1).
Figure 1. Supply arrengement
When the line current (Iline) is more than 0.5 mA
greater than the sum of the IC supply current (ICC)
and the current draw by the peripheral circuitry
connected to VCC (Ip) the excess current is shunted to
VEE via LN.
The regulated voltage on the line terminal (VLN) can
be calculated as:
VLN = Vref + ISLPE x R9
VLN = Vref + ((Iline - ICC - 0.5 x 10-3 A)-Ip) x R9
SLS
System Logic
Semiconductor
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