HMP8112A 데이터 시트보기 (PDF) - Harris Semiconductor
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HMP8112A Datasheet PDF : 40 Pages
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HMP8112A
TABLE 14. HAGC START TIME (LSB) REGISTER
SUB ADDRESS = 0x08
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
HAGC
This register provides a programmable delay for the HAGC pulse that control the sync 0011 1111B
START Time (LSB) tip AGC in the A/D converters. This is the lower byte of the 10-bit word.
(0x3F)
TABLE 15. HAGC START TIME (MSB) REGISTER
SUB ADDRESS = 0x09
BIT
NUMBER
FUNCTION
DESCRIPTION
15 - 10 Not Used
Write Ignored, Read 0’s.
9-8
HAGC
This register provides a programmable delay for the HAGC pulse that control the sync
START Time (MSB) tip AGC in the A/D converters. This is the upper byte of the 10-bit word.
RESET
STATE
0000 0011B
(0x03)
BIT
NUMBER
FUNCTION
7-0
HAGC
END Time (LSB)
TABLE 16. HAGC END TIME (LSB) REGISTER
SUB ADDRESS = 0x0A
DESCRIPTION
This register provides a programmable delay for the HAGC pulse that control the sync
tip AGC in the A/D converters. This is the lower byte of the 10-bit word.
RESET
STATE
0000 0000B
(0x00)
BIT
NUMBER
FUNCTION
15 - 10 Not Used
9-8
HAGC
END Time (MSB)
TABLE 17. HAGC END TIME (MSB) REGISTER
SUB ADDRESS = 0x0B
DESCRIPTION
RESET
STATE
Write Ignored, Read 0’s
This register provides a programmable delay for the HAGC pulse that controls the sync
tip AGC in the A/D converters. This is the upper byte of the 10-bit word.
0000 0000B
(0x00)
TABLE 18. HSYNC START TIME (LSB) REGISTER
SUB ADDRESS = 0x0C
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
HSYNC Pulse
This register provides a programmable delay for the external HSYNC pulse. This is the 0011 1011B
START Time (LSB) lower byte of the 10-bit word.
(0x3B)
TABLE 19. HSYNC START TIME (MSB) REGISTER
SUB ADDRESS = 0x0D
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
15 - 10
9-8
Not Used
Write Ignored, Read 0’s
HSYNC Pulse
This register provides a programmable delay for the external HSYNC pulse. This is the
START Time (MSB) upper byte of the 10-bit word.
0000 0011B
(0x03)
4-18
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