74VCX08(2013) 데이터 시트보기 (PDF) - Fairchild Semiconductor

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74VCX08
(Rev.:2013)

Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs

Fairchild Semiconductor 

Connection Diagrams

Pin Assignments for SOIC and TSSOP

Logic Symbol

IEEE/IEC

Pad Assignments for DQFN

(Top View)

Pin Description

Pin Names

An, Bn

On

DAP

Description

Inputs

Outputs

No Connect

Note: DAP (Die Attach Pad)

(Bottom View)

©1999 Fairchild Semiconductor Corporation

74VCX08 Rev. 1.9.1

2

www.fairchildsemi.com

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