MJW16110 데이터 시트보기 (PDF) - Motorola => Freescale
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MJW16110 Datasheet PDF : 10 Pages
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MJ16110 MJW16110
100
SECOND BREAKDOWN
DERATING
80
60
THERMAL
40
DERATING
20
MJ16110
MJW16110
0
0
40
80
120
160
200
TC, CASE TEMPERATURE (°C)
Figure 17. Power Derating
1
0.7 D = 0.5
0.5
0.3
0.2
0.2
0.1
0.1
0.07
0.05
0.03
0.03
0.02 0.02
0.01
0.01
SINGLE PULSE
0.02 0.03 0.05 0.1
RθJC(t) = r(t) RθJC
RθJC = 1 or 0.92°CW
TJ(pk) – TC = P(pk) RθJC(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
0.2 0.3 0.5 1
2 3 5 10 20 30 50
t, TIME (ms)
Figure 18. Thermal Response
100 200 300 500 1000
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
down. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
The data in Figure 14 is based on TC = 25_C; TJ(pk) is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25_C. Second breakdown limitations do not der-
ate the same as thermal limitations. Allowable current at the
voltages shown on Figure 14 may be found at any case tem-
perature by using the appropriate curve on Figure 17.
TJ(pk) may be calculated from the data in Figure 18. At
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Biased Safe Operating Area
and represents the voltage–current condition allowable dur-
ing reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 15 gives the RBSOA character-
istics.
SWITCHMODE DESIGN CONSIDERATIONS
FBSOA
Allowable dc power dissipation in bipolar power transistors
decreases dramatically with increasing collector–emitter
voltage. A transistor which safely dissipates 100 watts at
10 volts will typically dissipate less than 10 watts at its rated
V(BR)CEO(sus). From a power handling point of view, current
and voltage are not interchangeable (see Application Note
AN875).
TURN–ON
Safe turn–on load line excursions are bounded by pulsed
FBSOA curves. The 10 µs curve applies for resistive loads,
most capacitive loads, and inductive loads that are clamped
by standard or fast recovery rectifiers. Similarly, the 100 ns
curve applies to inductive loads which are clamped by ultra–
fast recovery rectifiers, and are valid for turn–on crossover
times less than 100 ns (AN952).
Motorola Bipolar Power Transistor Device Data
7
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