SSI7N60B 데이터 시트보기 (PDF) - Fairchild Semiconductor
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SSI7N60B Datasheet PDF : 9 Pages
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November 2001
SSW7N60B / SSI7N60B
600V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supplies.
Features
• 7.0A, 600V, RDS(on) = 1.2Ω @VGS = 10 V
• Low gate charge ( typical 38 nC)
• Low Crss ( typical 23 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D2-PAK
SSW Series
GDS
I2-PAK
SSI Series
G!
D
!
!
#"
!
!
!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, Tstg
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8! from case for 5 seconds
SSW7N60B / SSI7N60B
600
7.0
4.4
28
± 30
420
7.0
14.7
5.5
3.13
147
1.18
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
Typ
Max
Units
--
0.85
°C/W
--
40
°C/W
--
62.5
°C/W
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
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