IDT72511 데이터 시트보기 (PDF) - Integrated Device Technology

부품명

상세내역

일치하는 목록

IDT72511

PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18

Integrated Device Technology 

IDT72511/IDT72521

BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY

MILITARY AND COMMERCIAL TEMPERATURE RANGES

AC ELECTRICAL CHARACTERISTICS

(Commercial: VCC = 5V ± 10%, TA = 0°C to + 70°C; Military: VCC = 5V ± 10%, TA = –55°C to + 125°C)

Commercial

Military

Com'l & Mil.(4)

Symbol

Parameter

IDT72511L25 IDT72511L35

IDT72511L50

IDT72521L25 IDT72521L35 IDT72521L40 IDT72521L50

Min. Max. Min. Max. Min. Max. Min. Max. Unit

Timing

Figure

PORT B RETRANSMIT TIMING

tbDSBH

RER, REW, LDRER,

LDREW set-up and

recovery time

10

—

10

—

10

—

15

—

ns

9, 18

PROGRAMMABLE I/O TIMING

tPIOA

Programmable I/O

access time

—

20

—

25

—

25

—

30

ns

19

tPIOS

Programmable I/O set-

8

—

10

—

10

—

15

—

ns

19

up time

tPIOH

Programmable I/O hold

8

—

10

—

10

—

15

—

ns

19

time

BYPASS TIMING

tBYA

Bypass access time

—

18

—

20

—

25

—

30

ns

16

tBYD

Bypass delay

—

10

—

15

—

20

—

20

ns

16

taBYDV Bypass data valid time

15

—

15

—

15

—

15

—

ns

16

from DSA

tbBYDV (3) Bypass data valid time

3

—

3

—

3

—

3

—

ns

16

from DSB

FLAG TIMING (1) (2)

tREF

Read clock edge to

Empty Flag asserted

—

25

—

35

—

40

—

45

ns 14, 15, 20, 22

tWEF

Write clock edge to

—

25

—

35

—

40

—

45

ns 14, 15, 20, 22

Empty Flag not asserted

tRFF

Read clock edge to Full —

25

—

35

—

40

—

45

ns 14, 15, 21, 23

Flag not asserted

tWFF

Write clock edge to Full

—

25

—

35

—

40

—

45

ns 14, 15, 21, 23

Flag asserted

tRAEF

Read clock edge to

Almost-Empty Flag

asserted

—

40

—

50

—

55

—

60

ns

20, 22

tWAEF

Write clock edge to

—

40

—

50

—

55

—

60

ns

Almost-Empty Flag not

asserted

20, 22

tRAFF

Read clock edge to

Almost-Full Flag not

asserted

—

40

—

50

—

55

—

60

ns

21, 23

tWAFF

Write clock edge to

Almost-Full Flag

asserted

—

40

—

50

—

55

—

60

ns

21, 23

NOTES:

1. Read and write are internal signals derived from DSA, R/WA, DSB, R/WB, RB, and WB.

2668 tbl 23

2. Although the flags, Empty, Almost-Empty, Almost-Full, and Full Flags are internal flags, the timing given is for those assigned to external pins.

3. Values guaranteed by design, not currently tested.

4. IDT72511 not available in military.

5.32

17

Share Link: