MC100LVEL56 데이터 시트보기 (PDF) - ON Semiconductor

부품명

상세내역

일치하는 목록

MC100LVEL56

3.3V ECL Dual Differential 2:1 Multiplexer

ON Semiconductor 

MC100LVEL56

3.3 V ECL Dual Differential

2:1 Multiplexer

Description

The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The

differential data path makes the device ideal for multiplexing low skew

clock or other skew sensitive signals.

The device features both individual and common select inputs to

address both data path and random logic applications.

The differential inputs have special circuitry which ensures device

stability under open input conditions. When both differential inputs are

left open the D input will pull down to VEE, The D input will bias

around VCC/2 forcing the Q output LOW.

The VBB pin, an internally generated voltage supply, is available to

this device only. For single-ended input conditions, the unused

differential input is connected to VBB as a switching reference voltage.

VBB may also rebias AC coupled inputs. When used, decouple VBB and

VCC via a 0.01ĂmF capacitor and limit current sourcing or sinking to

0.5 mA. When not used, VBB should be left open.

Features

• 580 ps Typical Propagation Delays

• Separate and Common Select

• The 100 Series Contains Temperature Compensation

• PECL Mode Operating Range:

VCC = 3.0 V to 3.8 V with VEE = 0 V

• NECL Mode Operating Range:

VCC = 0 V with VEE = −3.0 V to −3.8 V

• Internal Input Pulldown Resistors on D(s), SEL(s), and COM_SEL

• Q Output will Default LOW with Inputs Open or at VEE

• These Devices are Pb-Free, Halogen Free and are RoHS Compliant

www.onsemi.com

SOIC−20 WB

DW SUFFIX

CASE 751D

MARKING DIAGRAM*

20

100LVEL56

AWLYYWWG

1

A

= Assembly Location

WL = Wafer Lot

YY

= Year

WW = Work Week

G

= Pb-Free Package

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

Device

Package Shipping†

MC100LVEL56DWG SOIC−20 WB 38 Units/Tube

(Pb-Free)

MC100LVEL56DWR2G SOIC−20 WB 1000/Tape & Reel

(Pb-Free)

†For information on tape and reel specifications, in-

cluding part orientation and tape sizes, please refer

to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

© Semiconductor Components Industries, LLC, 2016

1

July, 2016 − Rev. 13

Publication Order Number:

MC100LVEL56/D

Share Link: