U632H16 데이터 시트보기 (PDF) - Zentrum Mikroelektronik Dresden AG
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U632H16 Datasheet PDF : 14 Pages
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U632H16
SOFTWARE CONTROLLED STORE/RECALL CYCLEt, u, v, w (E = HIGH after STORE initiation)
Ai
E
DQi
Output
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
29
tcR
ADDRESS 1
33
tsu(A )SR
34
tw(E)SR
35
th(A )SR
High Impedance VALID
29
tcR
ADDRESS 6
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
35
33
tsu(A)SR
34
tw(E)SR
th(A )SR
5
tdis(E)
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
31 / 32
VALI D
td(E)S / td(E)R AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
30
tdis(E)SR
SOFTWARE CONTROLLED STORE/RECALL CYCLEt, u, v, w (E = LOW after STORE initiation)
29
Ai
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
tcR
ADDRESS 1
ADDRESS 6
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
E
DQi
Output
33
tsu(A )SR
34
tw(E)SR
35
th(A)SR
High Impedance VALID
33
tsu(A)SR
35
th(A )SR
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
31 / 32
td(E)S / td(E)R
VALI D
30
tdis(E)SR
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
u: If the chip enable pulse width is less then ta(E) (see READ cycle) but greater than or equal to tw(E)SR, then the data may not be valid at
the end of the low pulse, however the STORE or RECALL will still be initiated.
v: W must be HIGH when E is LOW during the address sequence in order to initiate a nonvolatile cycle. G may be either HIGH or LOW
throughout. Addresses 1 through 6 are found in the mode selection table. Address 6 determines whether the U632H16 performs a STORE
or RECALL.
w: E must be used to clock in the address sequence for the Software controlled STORE and RECALL cycles.
December 12, 1997
9
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