PTM1300 데이터 시트보기 (PDF) - Philips Electronics
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PTM1300 Datasheet PDF : 8 Pages
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TM-1300 Specifications
PHYSICAL
Process
Packaging
Power
Case Temperature
0.25-micron CMOS
292 T2BGA (169 functional)
supply core: 2.5 V; I/O: 3.3 V (5 V tol.)
consumption 1300 mA; 3.5 W
powerdown 300 mA
0 to 85 oC
CENTRAL PROCESSING UNIT
Clock Speed
143 or 166 MHz
Instruction Length variable (2 to 23 bytes); compressed
Instruction Set
arithmetic and logical ops, load/store ops.,
special multimedia and DSP ops., IEEE-
compliant floating point ops.
Issue Slots
5
Functional Units
27, pipelined
integer and floating-point arithmetic units,
data-parallel DSP-like units
name
qty
constant
5
integer ALU
5
memory load/store 2
shift
2
DSPALU
2
DSP multiply
2
branch
3
float ALU
2
integer/float mul 2
float compare
1
float sqrt./divide 1
latency
1
1
3
1
2
3
3
3
3
1
17
recovery
1
1
1
1
1
1
1
1
1
1
16
Registers
128 (32-bit width)
Special/SIMD Ops 32
MEMORY SYSTEM
Speed
CPU/Memory
Speed Ratios
Memory Size
Supported Types
Recommended
Configurations
Width
Max. Bandwidth
Interface
Signal Levels
143 MHz
programmable; 1:1, 5:4, 4:3, 3:2, and 2:1
512 KB to 64 MB (up to four ranks)
SDRAM (x4, x8, x16); SGRAM (x32);
64-Mbit SDRAM (x8, x16, x32)
128-Mbit SDRAM (x16)
8 MB: 1 2Mx32
16 MB: 2 4Mx16 or 2 2Mx32
32 MB: 4 2Mx32 or 4 4Mx16
32-bit bus
572 MB/sec (at 143 MHz)
glueless up to 4 chips (at 143 MHz); more
chips will require slower clock
3.3 V LVTTL
CACHES
Access
Associativity
Block Size
Size
data 8-, 16-, 32-bit word
instruction 64 bytes
8-way set-associative with hierarchical LRU
replacement
64 bytes
data 16 KB
instruction 32 KB
INTERNAL DATA HIGHWAY
Protocol
64-byte block-transfer
separate 32-bit data and 32-bit address buses
VIDEO IN
Supported Signals
Image Sizes
Functions
CCIR 601/656: 8-bit video (up to 40 Mpix/
sec; raw 8-10-bit data up to 80 MB/sec
all sizes, subject to sample rate
programmable on-the-fly 2X horizontal
resolution subsampling
VIDEO OUT
Image Sizes
Input Formats
Output Format
Clock Rates
Transfer Speeds
Functions
flexible, including CCIR601; max. 4K x 4K
pixels (subject to 80 MB/sec data rate)
YUV 4:2:2, YUV 4:2:0
CCIR601/656 8-bit video, PAL or NTSC
programmable (4-80 MHz), typ. 27 MB/sec
(13.5 Mpixels/sec for NTSC, PAL)
up to 80 MB/sec in data-streaming and mes-
sage passing modes; 40 Mpix/sec in YUV
4:2:2 mode
full 129-level alpha blending, genlock mode,
frame synchronization, chroma key, pro-
grammable YUV color clipping
AUDIO IN
No. of Channels
Sample Size
Sample Rates
Data Formats
External Interface
Clock Source
Native Protocol
2
8- or 16-bit samples per channel
programmable with 0.001 Hz resolution;
maximum is application dependent
8-bit or 16-bit mono and stereo; PC stan-
dard memory data format
4 pins; 1 programmable clock; 3 flexible ser-
ial input
internal or external
I2S and other serial 3-wire protocols
AUDIO OUT
No. of Channels
Sample Size
Sample Rates
Data Formats
External Interface
Clock Source
Native Protocol
8
16- or 32-bit samples per channel
programmable with 0.001 Hz resolution;
maximum is application dependent
16-bit (mono and stereo); 32-bit (mono and
stereo; PC standard memory data format
4 pins each; 1 programmable clock;
3 flexible serial output
internal or external
I2S and other serial 3-wire protocols
SPDIF OUT
No. of Channels
Sample Size
Bit Rate
External Interface
Clock Source
Native Protocol
up to 6
16 or 24 bits per channel
up to 40 Mbits/sec
1 pin, self clocking interface per IEC-958
internal
IEC-958, 1 wire
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