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BD9486F Datasheet PDF : 37 Pages
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BD9486F
3.5.Timing Chart
3.5.1 PWM Start up 1 (Input PWM Signal After Input STB Signal)
VCC
7.5V
STB
PWM
REG50
SS
GATE
RT
2.6V
3.7V
0.4V
2.0V
Datasheet
0.4V
STATE
OFF
STANDBY
SS
Normal
STANDBY SS
(*1) (*2)
(*3)
(*4)
(*5) (*6)
Figure 32. PWM Start up 1 (Input PWM Signal After Input STB Signal)
(*1)…REG50 starts up when STB is changed from Low to High. In the state where the PWM signal is not inputted, SS terminal
is not charged and DCDC doesn’t start to boost, either.
(*2)…When REG50 is more than 2.6V, the reset signal is released.
(*3)…The charge of the pin SS starts at the positive edge of PWM=L to H, and the soft start starts. The GATE pulse outputs only
during the corresponding PWM=H. And while the SS is less than 0.4V, the pulse does not output. The pin SS continues
charging in spite of the assertion of PWM or OVP level.
(*4)…The soft start interval will end if the voltage of the pin SS, Vss reaches 3.7V. By this time, it boosts VOUT to the voltage
where the set LED current flows. The abnormal detection of FBMAX starts to be monitored.
(*5)…As STB=L, the boost operation is stopped instantaneously. (Discharge operation continues in the state of STB=L and
REGUVLO=L. Please refer to section 3.5.3)
(*6)…In this diagram, before the charge period is completed, STB is changed to High again. As STB=H again, the boost
operation restarts the next PWM=H. It is the same operation as the timing of (*2). (For capacitance setting of SS terminal,
please refer to section 3.2.1.
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TSZ2211115001
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TSZ02201-0F1F0C100240-1-2
13.Feb.2014 Rev.004

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