HI1-0506A-8(1999) 데이터 시트보기 (PDF) - Intersil

부품명

상세내역

일치하는 목록

HI1-0506A-8
(Rev.:1999)

16-Channel, 8-Channel, Differential 8-Channel and Differential 4-Channel, CMOS Analog MUXs with Active Overvoltage Protection

Intersil 

HI-506A, HI-507A, HI-508A, HI-509A

Absolute Maximum Ratings

V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44V

V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +22V

V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V

Digital Input Voltage (VEN, VA) . . . . . . . . . . . . . (V-) -4V to (V+) +4V

or 20mA, Whichever Occurs First

Analog Signal (VIN, VOUT). . . . . . . . . . . . . . . (V-) -20V to (V+) +20V

Continuous Current, IN or OUT . . . . . . . . . . . . . . . . . . . . . . . . 20mA

Peak Current, IN or OUT, Pulsed 1ms, 10% Duty Cycle (Max). . 40mA

Operating Conditions

Temperature Ranges

HI-506A/507A/508A/509A-2, -8 . . . . . . . . . . . . . . -55oC to 125oC

HI-506A/507A/508A/509A-5, -7 . . . . . . . . . . . . . . . . . 0oC to 75oC

Thermal Information

Thermal Resistance (Typical, Note 1)

θJA (oC/W) θJC (oC/W)

28 Ld CERDIP Package. . . . . . . . . . . .

55

18

16 Ld CERDIP Package. . . . . . . . . . . .

85

32

28 Ld PDIP Package . . . . . . . . . . . . . .

60

N/A

16 Ld PDIP Package . . . . . . . . . . . . . .

90

N/A

Maximum Junction Temperature

CERDIP Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175oC

PDIP Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150oC

Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications Supplies = +15V, -15V; VREF Pin = Open; VAH (Logic Level High) = 4V; VAL (Logic Level Low) = 0.8V,

Unless Otherwise Specified. For Test Conditions, Consult Test Circuits Section

PARAMETER

TEST

TEMP

-2, -8

-5, -7

CONDITIONS (oC)

MIN TYP MAX MIN TYP MAX UNITS

DYNAMIC CHARACTERISTICS

Access Time, tA

Note 2

25

-

0.5

-

-

0.5

-

µs

Full

-

-

1.0

-

-

1.0

µs

Break-Before-Make Delay, tOPEN

Enable Delay (ON), tON(EN)

Note 2

Note 2

25

25

80

-

25

80

-

ns

25

-

300 500

-

300

-

ns

Full

-

-

1000

-

-

1000

ns

Enable Delay (OFF), tOFF(EN)

Note 2

25

-

300 500

-

300

-

ns

Full

-

-

1000

-

-

1000

ns

Settling Time, tS

HI-506A and HI-507A

HI-508A and HI-509A

To 0.1%

To 0.01%

To 0.1%

25

-

1.2

-

-

1.2

-

µs

25

-

3.5

-

-

3.5

-

µs

25

-

1.2

-

-

1.2

-

µs

To 0.01%

25

-

3.5

-

-

3.5

-

µs

Off Isolation

Note 7

25

50

68

-

50

68

-

dB

Channel Input Capacitance, CS(OFF)

Channel Output Capacitance, CD(OFF)

HI-506A

25

-

10

-

-

10

-

pF

25

-

52

-

-

52

-

pF

HI-507A

25

-

30

-

-

30

-

pF

HI-508A

25

-

25

-

-

25

-

pF

HI-509A

25

-

12

-

-

12

-

pF

Digital Input Capacitance, CA

Input to Output Capacitance, CDS(OFF)

DIGITAL INPUT CHARACTERISTICS

25

-

10

-

-

10

-

pF

25

-

0.1

-

-

0.1

-

pF

Input Low Threshold, TTL Drive, VAL

Input High Threshold, VAH (Note 9)

Input Leakage Current (High or Low), IA

Note 2

Note 2

Notes 2, 6

Full

-

-

0.8

-

-

0.8

V

Full

4.0

-

-

4.0

-

-

V

Full

-

-

1.0

-

-

1.0

µA

7

Share Link: