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PA9542A Datasheet PDF : 15 Pages
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Philips Semiconductors
2-channel I2C multiplexer and interrupt logic
Product data sheet
PCA9542A
The pass gates of the multiplexer are constructed such that the VDD
pin can be used to limit the maximum high voltage which will be
passed by the PCA9542A. This allows the use of different bus
voltages on each SCx/SDx pair, so that 1.8 V, 2.5 V, or 3.3 V parts
can communicate with 5 V parts without any additional protection.
External pull-up resistors pull the bus up to the desired voltage level
for each channel. All I/O pins are 5 V tolerant.
PIN CONFIGURATION
FEATURES
1-of-2 bi-directional translating multiplexer
I2C interface logic; compatible with SMBus
2 Active Low Interrupt Inputs
Active Low Interrupt Output
3 address pins allowing up to 8 devices on the I2C-bus
Channel selection via I2C-bus
Power up with all multiplexer channels deselected
Low RdsON switches
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and
5 V buses
No glitch on power-up
Supports hot insertion
Low stand-by current
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant Inputs
0 to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000V per JESD22-C101
Latchup testing is done to JESDEC Standard JESD78 which
exceeds 100 mA
Packages offered: SO14, TSSOP14
DESCRIPTION
The PCA9542A is a 1-of-2 bi-directional translating multiplexer,
controlled via the I2C-bus. The SCL/SDA upstream pair fans out to
two SCx/SDx downstream pairs, or channels. Only one SCx/SDx
channel is selected at a time, determined by the contents of the
programmable control register. Two interrupt inputs, INT0 and INT1,
one for each of the SCx/SDx downstream pairs, are provided. One
interrupt output, INT, which acts as an AND of the two interrupt
inputs, is provided.
A power-on reset function puts the registers in their default state and
initializes the I2C state machine with no channels selected.
A0 1
A1 2
A2 3
INT0 4
SD0 5
SC0 6
VSS 7
14 VDD
13 SDA
12 SCL
11 INT
10 SC1
9 SD1
8 INT1
SW00475
Figure 1. Pin configuration
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
1
A0
2
A1
3
A2
4
INT0
5
SD0
6
SC0
7
VSS
8
INT1
9
SD1
10
SC1
11
INT
12
SCL
13
SDA
14
VDD
FUNCTION
Address input 0
Address input 1
Address input 2
Active LOW interrupt input 0
Serial data 0
Serial clock 0
Supply ground
Active LOW interrupt input 1
Serial data 1
Serial clock 1
Active LOW interrupt output
Serial clock line
Serial data line
Supply voltage
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
TOPSIDE MARK
DRAWING NUMBER
14-Pin Plastic SO
–40 °C to +85 °C
PCA9542AD
PCA9542AD
SOT108-1
14-Pin Plastic TSSOP
–40 °C to +85 °C
PCA9542APW
PA9542A
Standard packing quantities and other packaging data is available at www.standardproducts.philips.com/packaging.
SOT402-1
2004 Sep 29
2

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