ST7529 데이터 시트보기 (PDF) - Sitronix Technology Co., Ltd.

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ST7529

32 Gray Scale Dot Matrix LCD Controller/Driver

Sitronix Technology Co., Ltd. 

ST7529

7.2 ACCESS TO DDRAM AND INTERNAL REGISTERS

Since ST7529 access from MPU by pipeline processing via the bus holder attached to the internal that requires only the

cycle time but no waiting time, it can achieves high-speed data transfer.

For example, when MPU writes data to the DDRAM, the data is once held by the bus holder and then written to the

DDRAM before the succeeding write cycle start. When MPU reads data from the DDRAM, the first read cycle is dummy

and the data read in the dummy cycle is held by the bus holder, and then it read from the bus holder to the system bus in

the succeeding read cycle. Fig. 7.2.1 illustrates these relations.

MPU signal

Write

Operation A0

/WR

DATA

N

Internal signals

/WR

BUS HOLDER

N

COLUMN ADDRESS

D(N) D(N+1) D(N+2) D(N+3)

D(N) D(N+1) D(N+2) D(N+3)

N

N+1 N+2 N+3

MPU signal

Read

Operation A0

/WR

/RD

DATA

N

Dummy D(N) D(N+1)

Internal signals

/W R

/RD

BUS HOLDER

COLUMN ADDRESS

N

N

D(N) D(N+1) D(N+2)

D(N) D(N+1) D(N+2)

Fig 7.2.1

Ver 1.8

20/86

2007/10/25

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