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ST7529
SITRONIX
Sitronix Technology Co., Ltd. SITRONIX
ST7529 Datasheet PDF : 86 Pages
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ST7529
7. FUNCTIONAL DESCRIPTION
7.1 MICROPROCESSOR INTERFACE
Chip Select Input
The XCS pin is for chip selection. The ST7529 can function with an MPU when XCS is "L". In case of serial interface, the
internal shift register and the counter are reset.
7.1.1 Selecting Parallel / Serial Interface
ST7529 has seven types of interface with an MPU, which are four parallel and three serial interfaces. This parallel or serial
interface is determined by IF pin as shown in table 7.1.1.
Table 7.1.1 Parallel / Serial Interface Mode
IF1 IF2 IF3 Interface type XCS
H H H 80 serial 16-bit parallel XCS
H H L 80 serial 8-bit parallel XCS
H L L 68 serial 16-bit parallel XCS
L H H 68 serial 8-bit parallel XCS
L L H 9-bit SPI mode (3 line) XCS
L L L 8-bit SPI mode (4 line) XCS
A0 /RD(E) /WR(R/W) D15 to D8 D7 to D0 SI SCL
A0 /RD
/WR D15 to D8 D7 to D0 -- --
A0 /RD
/WR
--
D7 to D0 -- --
A0 E
R/W D15 to D8 D7 to D0 -- --
A0 E
R/W
--
D7 to D0 -- --
--
--
--
--
SI SCL
A0 --
--
--
SI SCL
Note: “--” means “disabled” in pins A0, E_RD, and RW_WR, and “high impedance” in pins DB0 to DB15.
ACK
--
--
--
--
--
--
7.1.2 8- or 16-bit Parallel Interface
The ST7529 identifies the type of the data bus signals according to the combination of A0, /RD (E) and /WR (W/R) as
shown in table 7.1.2.
Table 7.1.2 Parallel Data Transfer
Common
6800-series
A0
R/W
E
H
H
H
H
L
H
L
H
H
L
L
H
8080-series
/RD
/WR
L
H
H
L
L
H
H
L
Description
Display data read out
Display data write
Register status read
Writes to internal register (instruction)
Relation between Data Bus and Gradation Data
ST7529 offers the 2bytes 3pixels(2B3P), 3bytes 3pixels(3B3P) mode to display 32 gray scale data.
(1) 2B3P 32 Gray Scale Display
1. 8-bit mode
D7 D6 D5 D4 D3 D2 D1 D0
P0 P0 P0 P0 P0 P1 P1 P1 1st write
P1 P1 X P2 P2 P2 P2 P2 2nd write
A single pixel of data is read after the second write operation as shown, and it is written in the display RAM.
“X” are dummy bits, which are ignored for display.
2. 16-bit mode
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
P0 P0 P0 P0 P0 P1 P1 P1 P1 P1 X P2 P2 P2 P2 P2
Data is acquired through the operation of writing signal, and then written to the display RAM.
“X” are dummy bits, which are ignored for display.
Ver 1.8
16/86
2007/10/25

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