BR34L02-W 데이터 시트보기 (PDF) - ROHM Semiconductor
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BR34L02-W Datasheet PDF : 17 Pages
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●COMMAND
○READ CYCLE
With READ CYCLE operation, the data is read from the EEPROM. READ CYCLE has RANDOM READ CYCLE and
CURRENT READ CYCLE. RANDOM READ CYCLE is usually used to read the data in the indicated address.
Also CURRENT READ CYCLE is used to read the data in the address indicated internally and make a role of verifying
the data immediately after WRITE OPERATION. The Sequential Read operation can be performed with both Current
Read and Random Read. With SEQUENTIAL READ CYCLE, it is possible to read the next data continuously.
SDA
L IN E
S
W
T
R
A
I
R
SLAVE
T
T ADDRESS E
W ORD
ADDRESS(n)
S
T
R
A
E
R
SLAVE
A
T ADDRESS D
It is necessary to input
“high” at last ACK timing.
S
T
O
DATA(n)
P
1 0 1 0 A 2A 1A 0
WA
7
RA
/C
WK
WA
0
A
C
K
1 0 1 0 A 2 A 1A 0
D7
RA
/C
WK
D0
A
C
K
S
T
A
R SLAVE
T ADDRESS
Fig.36 RANDOM READ CYCLE TIMING
R
S
E
T
A
D
DATA
O It is necessary to input
P “high” at last ACK timing.
SDA
LINE
1 0 1 0 A2 A1 A0
D7
D0
RA
A
/C
C
WK
K
Fig.37 CURRENT READ CYCLE TIMING
・ Random Read operation allows the master to access any memory location indicated by word address.
・ In case that the previous operation is Random or Current Read (which includes Sequential Read respectively), the
internal address counter is increased by one from the last accessed address (n). Thus Current Read outputs the data
of the next word address (n+1).
・ If an Acknowledge is detected, and no STOP condition is generated by the master (μ-COM), the device will continue
to transmit the data. ［It can transmit all data (2kbit 256word)］
・ If an Acknowledge is not detected, the device will terminate further data transmissions and await a STOP condition
before returning to the standby mode.
・ If an Acknowledge is detected with "Low" level, not "High" level, command will become Sequential Read. So the device
transmits the next data, Read is not terminated. In the case of terminating Read, input Acknowledge with "High" always,
then input stop condition.
SDA
L IN E
S
R
T
E
A
A
R
SLAVE
D
T ADDRESS
1 0 1 0 A 2A 1A 0
D A T A (n )
D7
D0
S
T
DATA(n+x)
O
P
D7
D0
It is necessary to
input “high” at last
ACK timing.
RA
A
A
A
/C
WK
C
K
C
K
C
K
Fig.38 SEQUENTIAL READ CYCLE TIMING （With Current Read）
・If an Acknowledge is detected, and no STOP condition is generated by the master (μ-COM), the device will continue
to transmit the data. ［It can transmit all data (2kbit 256word)］
・If an Acknowledge is not detected, the device will terminate further data transmissions and await a STOP condition
before returning to the standby mode.
・If an Acknowledge is detected with "Low" level, not "High" level, command will become Sequential Read. So the
device transmits the next data, Read is not terminated. In the case of terminating Read, input Acknowledge with "High"
always, then input stop condition.
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