PIC24HJ128GP202 데이터 시트보기 (PDF) - Microchip Technology
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PIC24HJ128GP202 Datasheet PDF : 357 Pages
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PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
3.3 Special MCU Features
The PIC24HJ32GP302/304, PIC24HJ64GPX02/X04
and PIC24HJ128GPX02/X04 features a 17-bit by 17-
bit, single-cycle multiplier. The multiplier can perform
signed, unsigned and mixed-sign multiplication. Using
a 17-bit by 17-bit multiplier for 16-bit by 16-bit
multiplication makes mixed-sign multiplication
possible.
The PIC24HJ32GP302/304, PIC24HJ64GPX02/X04
and PIC24HJ128GPX02/X04 devices support 16/16
and 32/16 integer divide operations. All divide
instructions are iterative operations. They must be
executed within a REPEAT loop, resulting in a total
execution time of 19 instruction cycles. The divide
operation can be interrupted during any of those
19 cycles without loss of data.
A multi-bit data shifter is used to perform up to a 16-bit,
left or right shift in a single cycle.
FIGURE 3-1:
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04 CPU
CORE BLOCK DIAGRAM
PSV and Table
Data Access
Control Block
Interrupt
Controller
X Data Bus
8
16
16
16
23
PCU PCH PCL
23
Program Counter
Stack
Control
Logic
Loop
Control
Logic
Data Latch
DMA
X RAM
RAM
16
Address
Latch
23
16
DMA
Address Latch
Address Generator Units
Controller
Program Memory
Data Latch
24
Instruction
Decode and
Control
Control Signals
to Various Blocks
ROM Latch
EA MUX
16 16
Instruction Reg
16
17 x 17 Multiplier
Divide Support
16 x 16
W Register Array
16
16-bit ALU
16
To Peripheral Modules
DS70293D-page 20
Preliminary
© 2009 Microchip Technology Inc.
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