74LVC32A(2018) 데이터 시트보기 (PDF) - NXP Semiconductors.

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74LVC32A
(Rev.:2018)

Quad 2-input OR gate

NXP Semiconductors. 

Nexperia

4. Functional diagram

1 1A

2 1B

4 2A

5 2B

9 3A

10 3B

12 4A

13 4B

Fig. 1. Logic symbol

1Y 3

2Y 6

3Y 8

4Y 11

mna242

A

B

Fig. 3. Logic diagram for one gate

5. Pinning information

5.1. Pinning

74LVC32A

1A 1

1B 2

14 VCC

13 4B

1Y 3

12 4A

2A 4

11 4Y

2B 5

10 3B

2Y 6

9 3A

GND 7

8 3Y

aaa-028965

Fig. 4. Pin configuration SOT108-1 (SO14)

74LVC32A

Quad 2-input OR gate

1

≥1

3

2

4

≥1

6

5

9

≥1

8

10

12

≥1

11

13

Fig. 2. IEC logic symbol

mna243

Y

mna241

74LVC32A

1A 1

1B 2

1Y 3

2A 4

2B 5

2Y 6

GND 7

14 VCC

13 4B

12 4A

11 4Y

10 3B

9 3A

8 3Y

aaa-028966

Fig. 5. Pin configuration SOT337-1 (SSOP14) and

SOT402-1 (TSSOP14)

74LVC32A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 6 — 12 September 2018

© Nexperia B.V. 2018. All rights reserved

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