MCIMX283DVM4B(2012) 데이터 시트보기 (PDF) - Freescale Semiconductor

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MCIMX283DVM4B
(Rev.:2012)

i.MX28 Applications Processors Data Sheet for Consumer Products

Freescale Semiconductor 

Introduction

such as memories and SD cards, as well as provide battery charging capability for Li-Ion batteries.

The i.MX28 processor includes an additional 128-Kbyte on-chip SRAM to make the device ideal for

eliminating external RAM in applications with small footprint RTOS.

The i.MX28 supports connections to various types of external memories, such as mobile DDR, DDR2 and

LV-DDR2, SLC and MLC NAND Flash.

The i.MX28 can be connected to a variety of external devices such as high-speed USB2.0 OTG, CAN,

10/100 Ethernet, and SD/SDIO/MMC.

1.1 Device Features

The following lists the features of the i.MX28:

• ARM926EJ-S CPU running at 454 MHz:

— 16-Kbyte instruction cache and 32-Kbyte data cache

— ARM embedded trace macrocell (CoreSight™ ETM9™)

— Parallel JTAG interface

• 128 KBytes of integrated low-power on-chip SRAM

• 128 KBytes of integrated mask-programmable on-chip ROM

• 1280 bits of on-chip one-time-programmable (OCOTP) ROM

• 16-bit mobile DDR (mDDR) (1.8 V), DDR2 (1.8 V) and LV-DDR2 (1.5 V), up to 205 MHz DDR

clock frequency with voltage overdrive

• Support for up to eight NAND Flash memory devices with up to 20-bit BCH ECC

• Four synchronous serial ports (SSP) for SDIO/MMC/MS/SPI: SSP0, SSP1, SSP2, and SSP3. SSP0

and SSP1 can support three modes,1-bit, 4-bit, and 8-bit, whereas SSP2 and SSP3 can support only

1-bit and 4-bit modes.

• 10/100-Mbps Ethernet MAC compatible with IEEE Std 802.3™:

— Single 10/100 Ethernet with GMII/RMII or Dual 10/100 Ethernet with RMII interface

— Supporting IEEE Std 1588™-compatible hardware timestamp

— Supporting 50-MHz/25-MHz clock output for external Ethernet PHY

• Two 2.0B protocol-compatible Controller Area Network (CAN) interfaces

• One USB2.0 OTG device/host controller and PHY

• One USB2.0 host controller and PHY

• LCD controller, up to 24-bit RGB (DOTCK) modes and 24-bit system-mode

• Pixel-processing pipeline (PXP) supports full path from color-space conversion, scaling,

alpha-blending to rotation without intermediate memory access.

• SPDIF transmitter

• Dual serial audio interface (SAIF) to support full-duplex transmit and receive operations; each

SAIF supports three stereo pairs

• Five application Universal Asynchronous Receiver-Transmitters (UARTs), up to 3.25 Mbps with

hardware flow control

i.MX28 Applications Processors for Consumer Products, Rev. 3

2

Freescale Semiconductor

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