HEF4043B-Q100 데이터 시트보기 (PDF) - NXP Semiconductors.
부품명
상세내역
일치하는 목록
HEF4043B-Q100 Datasheet PDF : 15 Pages
| |||
NXP Semiconductors
HEF4043B-Q100
Quad R/S latch with 3-state outputs
11. Dynamic characteristics
Table 7. Dynamic characteristics
VSS = 0 V; Tamb = 25 C; For waveforms and test circuit see Section 12; unless otherwise specified.
Symbol Parameter
Conditions
VDD
Extrapolation formula Min Typ
tPHL
HIGH to LOW
nR nQ;
5V
[1] 63 ns + (0.55 ns/pF)CL -
90
propagation delay see Figure 4 10 V
24 ns + (0.23 ns/pF)CL -
35
15 V
17 ns + (0.16 ns/pF)CL -
25
tPLH
LOW to HIGH
nS nQ;
5V
[1] 38 ns + (0.55 ns/pF)CL -
65
propagation delay see Figure 4 10 V
14 ns + (0.23 ns/pF)CL -
25
15 V
7 ns + (0.16 ns/pF)CL -
15
tt
transition time
nQ output;
5 V [1] [2] 10 ns + (1.00 ns/pF)CL -
60
see Figure 4 10 V
9 ns + (0.42 ns/pF)CL -
30
15 V
6 ns + (0.28 ns/pF)CL -
20
tPHZ
HIGH to OFF-state OE nQ;
5V
propagation delay see Figure 5 10 V
-
45
-
20
15 V
-
10
tPLZ
LOW to OFF-state OE nQ;
5V
propagation delay see Figure 5 10 V
-
50
-
20
15 V
-
10
tPZH
OFF-state to HIGH OE nQ;
5V
propagation delay see Figure 5 10 V
-
25
-
15
15 V
-
10
tPZL
OFF-state to LOW OE nQ;
5V
propagation delay see Figure 5 10 V
-
40
-
20
15 V
-
15
tW
pulse width
nS input HIGH; 5 V
minimum width; 10 V
see Figure 4
15 V
30 15
20 10
16 8
nR input HIGH; 5 V
minimum width; 10 V
see Figure 4
15 V
30 15
20 10
16 8
Max Unit
180 ns
70 ns
50 ns
135 ns
50 ns
35 ns
120 ns
60 ns
40 ns
90 ns
35 ns
25 ns
100 ns
40 ns
25 ns
50 ns
30 ns
25 ns
80 ns
45 ns
35 ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] tt is the same as tTHL and tTLH.
HEF4043B_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 July 2013
© NXP B.V. 2013. All rights reserved.
6 of 14
Share Link: 