HEF4043B-Q100 데이터 시트보기 (PDF) - NXP Semiconductors.
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HEF4043B-Q100 Datasheet PDF : 15 Pages
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HEF4043B-Q100
Quad R/S latch with 3-state outputs
Rev. 1 — 15 July 2013
Product data sheet
1. General description
The HEF4043B-Q100 is a quad R/S latch with 3-state outputs with a common output
enable input (OE). Each latch has an active HIGH set input (1S to 4S), an active HIGH
reset input (1R to 4R) and an active HIGH 3-state output (1Q to 4Q).
The nR and nS inputs determine the latch output (nQ) when OE is HIGH (see Table 3).
When OE is LOW, the latch outputs are in the high impedance OFF-state. OE does not
affect the state of the latch. The high impedance off-state feature allows common bussing
of the outputs.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 3) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 3)
Specified from 40 C to +85 C
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
ESD protection:
MIL-STD-833, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Complies with JEDEC standard JESD 13-B
3. Applications
Four-bit storage with output enable
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