L24C16 데이터 시트보기 (PDF) - Unspecified
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L24C16 Datasheet PDF : 17 Pages
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Tel:86-755-8835 3502/03/04
Website:http://www.lizhiic.com
Fax:86-755-8835 3509
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which
must precede any other command (see to Figure 2 on page 5).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a
read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 2 on
page 5).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM
in 8-bit words. The EEPROM sends a "0" to acknowledge that it has received each word. This
happens during the ninth clock cycle.
STANDBY MODE: The L24C02B/L24C04/L24C08B/L24C16 features a low-power standby mode
which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the completion of
any internal operations.
MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-wire part
can be reset by following these steps:
1. Clock up to 9 cycles.
2. Look for SDA high in each cycle while SCL is high.
3. Create a start condition.
● Figure 1: Data Validity
l Figure 2: Start and Stop Definition
Shenzhen LIZE Electronic Technology Co., Ltd
Version: 2.0
Date: 15, Apr. 2010
Page: 5 of 16
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