SCY99079CDR2G 데이터 시트보기 (PDF) - ON Semiconductor

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SCY99079CDR2G

PWM Current-Mode Controller for High-Power Universal Off-Line Supplies

ON Semiconductor 

DAP018A/B/C/D/F

OPP 1

Latch 2

Soft−start ended?

Yes = 1, No = 0

+

-

+

Vlatch

Timer 3

from fault

in OCP

latched versions

20 ms time

constant

S

Q

Q

R

Jitter 4

5 V reset

Vtimfault

+

-

VDD

+

Itim

BO release

(B & D)

fault

IpFlag

Power On

Reset

VDD

Frequency

iCjit Modulation

2.iCjit

+

VDD

Ifold

Fold 5

+

+

-

Vskip

VDD

RFB

/4.2

FB 6

+

-

Frequency

Foldback

Vfold

Skip

Rramp

+

- Standby?

→ bias

reduction

VOTP

+

+

-

5 V on

VCC Reset

IpFlag

Fault

VCC and Logic

Management

Power

on reset

VCCON

VCC(min)

VCClatch

BO (dble

hiccup reset)

+

BO ok

20 ms time

constant

VDD

65/100 kHz

Clock

S

Q

Q

R

VDD

IOTP

14 HV

13 NC

+

-

+

-

12 OTP

IC1

B and D versions

turned

off when

BO ok

11 BO

IBO

+

VBO

Clamp

10 VCC

9 Drv

+

-

5 ms

SS

The soft−start is activated during:

− the startup sequence

− the auto−recovery burst mode

− a brown−out release (B & D)

IpFlag

VFB/4.2 > Vset > Vfold/4.2

Vfold

/4.2

CS 7

VOPP

Vlimit + VOPP

+

LEB

Figure 2. Internal Circuit Architecture

+ Vlimit

8 GND

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