74ABT20 데이터 시트보기 (PDF) - NXP Semiconductors.
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74ABT20 Datasheet PDF : 13 Pages
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Nexperia
74ABT20
Dual 4-input NAND gate
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a. Input pulse definition
b. Test circuit
Fig 7.
Test data is given in Table 8.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Test circuit for measuring switching times
9(;7
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Table 8.
Input
VI
3.0 V
Test data
fi
1 MHz
tW
500 ns
tr, tf
2.5 ns
Load
CL
50 pF
RL
500
VEXT
tPHL, tPLH
open
74ABT20
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 12 August 2016
© Nexperia B.V. 2017. All rights reserved
6 of 13
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