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GS1500

HDTV Serial Digital Deformatter with ANC FIFOs

Gennum -> Semtech 

PIN DESCRIPTIONS (Continued)

NUMBER

SYMBOL

TIMING

66

SAV_ERR

Synchronous

wrt PCLK_IN

67

EAV_ERR

Synchronous

wrt PCLK_IN

70

TEST

71

YCS_ERR

Synchronous

wrt PCLK_IN

72

CCS_ERR

Synchronous

wrt PCLK_IN

75, 74, 73

FF_STA[2:0]

76, 77, 80, 83,

84, 85, 86, 87,

88, 89

ANC_OUT[9:0]

Synchronous

wrt PCLK_IN

92

R_CLK

N/A

95

FOEN

Non-

synchronous

TYPE

DESCRIPTION

Output

Status Signal Output. Indicates a TRS error or a mismatch between

the embedded TRS and the flywheel TRS when the flywheel is

enabled. This signal is set high when an error in the SAV TRS is

detected or when the internal flywheel indicates there is a

mismatching SAV TRS. Refer to Fig. 3 for timing information of

SAV_ERR relative to LUMA (DATA_OUT[19:10]) and CHROMA

(DATA_OUT [9:0]).

Output

Status Signal Output. Indicates a TRS error or a mismatch between

the embedded TRS and the flywheel TRS when the flywheel is

enabled. This signal is set high when an error in the EAV TRS is

detected or when the internal flywheel indicates there is a

mismatching EAV TRS. Refer to Fig. 3 for timing information of

EAV_ERR relative to LUMA (DATA_OUT[19:10]) and CHROMA

(DATA_OUT [9:0]).

TEST Test Pin. Used for test purposes only. This pin must be connected to

GND for normal operation.

Output

Status Signal Output. Indicates a checksum error or a mismatch

between the embedded checksum and the calculated checksum

for the LUMA (DATA_OUT[19:10]) channel. When YCS_ERR is high,

an error in the checksum is detected. Refer to Fig. 18 for timing

information of YCS_ERR relative to LUMA (DATA_OUT[19:10]).

Output

Status Signal Output. Indicates a checksum error or a mismatch

between the embedded checksum and the calculated checksum

for the CHROMA (DATA_OUT[9:0]) channel. When CCS_ERR is

high, an error in the checksum is detected. Refer to Fig. 18 for

timing information of CCS_ERR relative to CHROMA (DATA_OUT

[9:0]).

Output

Control Signal Output. FF_STA[2:0] is the FIFO status output to

indicate the content level of the internal FIFOs.

FF_STA[2:0]=000: Error flag, FIFO is under run .

FF_STA[2:0]=001: FIFO is empty.

FF_STA[2:0]=010: FIFO is almost empty; 32 bytes filled

FF_STA[2:0]=011: FIFO is ready.

FF_STA[2:0]=100: FIFO is half full.

FF_STA[2:0]=101: FIFO is almost full; 992 bytes filled

FF_STA[2:0]=110: FIFO is full.

FF_STA[2:0]=111: Error flag, FIFO is over run.

When ANC_Y/C is high, FF_STA[2:0] indicates the status of the

LUMA ANC data FIFO. When ANC_Y/C is low, FF_STA[2:0]

indicates the status of the CHROMA ANC data FIFO. See Fig. 6 to

Fig. 15 for timing information.

Output

ANC Data Output Bus. ANC_OUT[9] is the MSB and ANC_OUT[0] is

the LSB. When ANC_Y/C is high, ANC_OUT[9:0] presents ANC data

from the LUMA FIFO. When ANC_Y/C is low, ANC_OUT[9:0]

presents ANC data from the CHROMA FIFO.

Input

Input Clock Signal. Used to read information from the internal

FIFO(s). On the rising edge of R_CLK, the device will extract the

next word from the internal LUMA/CHROMA channel data FIFO,

depending on the status of the ANC_Y/C signal.

Input

Control Signal Input. Used to enable or disable the internal FIFO

outputs. When FOEN is low, the FIFO ANC_OUT[9:0] and

FF_STA[2:0] are enabled. When FOEN is high, the FIFO

ANC_OUT[9:0] and FF_STA[2:0] outputs are in a high Z state. Note

that the internal read address pointers are updated independently

of FOEN.

7

GENNUM CORPORATION

522 - 33 - 01

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