M66255FP
Absolute Maximum Ratings
Item
Symbol
Supply voltage
VCC
Input voltage
VI
Output voltage
VO
Power dissipation
Pd
Storage temperature
Tstg
Note: * Ta ≥ 40°C are derated at −9.7 mW / °C
Ratings
−0.5 to +7.0
−0.5 to VCC + 0.5
−0.5 to VCC + 0.5
825*
−65 to 150
(Ta = 0 to 70°C, unless otherwise noted)
Unit
Conditions
V
A value based on GND pin
V
V
mW
Ta = 25°C
°C
Recommended Operating Conditions
Item
Symbol
Min
Typ
Max
Unit
Supply voltage
Supply voltage
VCC
4.5
5
5.5
V
GND
0
V
Operating ambient temperature Topr
0
70
°C
Electrical Characteristics
Item
"H" input voltage
"L" input voltage
"H" output voltage
"L" output voltage
"H" input current
Symbol
Min
Typ
VIH
2.0
VIL
VOH
VCC − 0.8
VOL
IIH
"L" input current
IIL
Off state "H" output current
IOZH
Off state "L" output current
IOZL
Operating mean current
ICC
dissipation
Input capacitance
CI
Off state output capacitance
CO
(Ta = 0 to 70°C, VCC = 5 V ± 10%, GND = 0 V)
Max Unit
Test Conditions
V
0.8
V
V
IOH = −4 mA
0.55
V
IOL = 4 mA
1.0
µA VI = VCC WE, WRES, WCK,
RE, RRES, RCK,
D0 to D9
−1.0
µA VI = GND WE, WRES, WCK,
RE, RRES, RCK,
D0 to D9
5.0
−5.0
µA VO = VCC
µA VO = GND
150
mA VI = VCC, GND, Output open
tWCK, tRCK = 30 ns
10
pF f = 1 MHz
15
pF f = 1 MHz
Function
When write enable input WE is "L", the contents of data inputs D0 to D9 are written into memory in synchronization
with rise edge of write clock input WCK. At this time, the write address counter is also incremented simultaneously.
The write functions given below are also performed in synchronization with rise edge of WCK.
When WE is "H", a write operation to memory is inhibited and the write address counter is stopped.
When write reset input WRES is "L", the write address counter is initialized.
When read enable input RE is "L", the contents of memory are output to data outputs Q0 to Q9 in synchronization with
rise edge of read clock input RCK. At this time, the read address counter is also incremented simultaneously.
The read functions given below are also performed in synchronization with rise edge of RCK.
When RE is "H", a read operation from memory is inhibited and the read address counter is stopped. The outputs are in
the high impedance state.
When read reset input RRES is "L", the read address counter is initialized.
REJ03F0249-0200 Rev.2.00 Sep 14, 2007
Page 3 of 13