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HEF4050BT(2016) 데이터 시트보기 (PDF) - NXP Semiconductors.

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HEF4050BT
(Rev.:2016)
NXP
NXP Semiconductors. NXP
HEF4050BT Datasheet PDF : 12 Pages
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HEF4050B
Hex non-inverting buffers
Rev. 10 — 23 June 2016
Product data sheet
1. General description
The HEF4050B provides six non-inverting buffers with high current output capability
suitable for driving TTL or high capacitive loads. Since input voltages in excess of the
buffers’ supply voltage are permitted, the buffers may also be used to convert logic levels
of up to 15 V to standard TTL levels. Their guaranteed fan-out into common bipolar logic
elements is shown in Table 3.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Accepts input voltages in excess of the supply voltage
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C
Complies with JEDEC standard JESD 13-B
3. Applications
LOCMOS (Local Oxidation CMOS) to DTL/TTL converter
HIGH sink current for driving two TTL loads
HIGH-to-LOW level logic conversion

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