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FS6209

Dual PLL VCXO Clock Generator IC

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February 1999

Table 2: Pin Descriptions

Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input,

DO = Digital Output; P = Power/Ground; # = Active Low pin

PIN

TYPE

NAME

DESCRIPTION

1

AI

XIN

VCXO Feedback

2

P

VDD

Power Supply (+3.3V)

3

AI

XTUNE

VCXO Tune

4

P

VSS

Ground

5

DO

CLKA

Clock Output A

6

DO

CLKB

Clock Output B

7

DO

VSS

Ground

8

AO

XOUT

VCXO Drive

3.0 Functional Block Description

3.1 Phase-Locked Loop (PLL)

The on-chip PLLs are a standard frequency- and phase-

locked loop architecture. The PLL multiplies the reference

oscillator to the desired frequency by a ratio of integers.

The frequency multiplication is exact with a zero synthe-

sis error.

3.2 Voltage-Controlled Crystal

Oscillator (VCXO)

The VCXO provides a tunable, low-jitter frequency refer-

ence for the rest of the FS6209 system components.

Loading capacitance for the crystal is internal to the

FS6209. No external components (other than the reso-

nator itself) are required for operation of the VCXO.

Continuous fine-tuning of the VCXO frequency is accom-

plished by varying the voltage on the XTUNE pin. The

total change (from one extreme to the other) in effective

loading capacitance is t.b.d. nominal.

The oscillator operates the crystal resonator in the paral-

lel-resonant mode. Crystal warping, or the “pulling” of the

crystal oscillation frequency, is accomplished by altering

the effective load capacitance presented to the crystal by

the oscillator circuit. The actual amount that changing the

load capacitance alters the oscillator frequency will be

dependent on the characteristics of the crystal as well as

the oscillator circuit itself.

Specifically, the motional capacitance of the crystal (usu-

ally referred to by crystal manufacturers as C1), the static

capacitance of the crystal (C0), and the load capacitance

(CL) of the oscillator determine the warping capability of

the crystal in the oscillator circuit.

A simple formula to obtain the warping capability of a

crystal oscillator is:

∆f

( ppm)

=

C1 × (C L2 − C )L1 ×106

2 × (C0 + C L2)× (C0 + C )L1

where CL1 and CL2 are the two extremes of the applied

load capacitance.

EXAMPLE: A crystal with the following parameters is

used. With C1 = 0.02pF, C0 = 5pF, CL1 = 10pF, and CL2 =

22.66pF, the coarse tuning range is

∆f

=

0.02 × (22.66 −10)×106

2 × (5 + 22.66)× (5 + 10)

=

305

ppm

.

2

,62

2.4.99

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